464 		return REG_GET(DISPC_CONTROL, bit, bit) == 1;  in dispc_mgr_go_busy()
481 		enable_bit = REG_GET(DISPC_CONTROL, bit, bit) == 1;  in dispc_mgr_go()
494 		go_bit = REG_GET(DISPC_CONTROL, bit, bit) == 1;  in dispc_mgr_go()
507 		REG_FLD_MOD(DISPC_CONTROL, 1, bit, bit);  in dispc_mgr_go()
1960 		REG_FLD_MOD(DISPC_CONTROL, enable ? 1 : 0, 0, 0);  in _enable_lcd_out()
1961 		dispc_read_reg(DISPC_CONTROL);  in _enable_lcd_out()
1977 			REG_GET(DISPC_CONTROL, 0, 0);  in dispc_mgr_enable_lcd_out()
2009 	REG_FLD_MOD(DISPC_CONTROL, enable ? 1 : 0, 1, 1);  in _enable_digit_out()
2011 	dispc_read_reg(DISPC_CONTROL);  in _enable_digit_out()
2022 	if (REG_GET(DISPC_CONTROL, 1, 1) == enable)  in dispc_mgr_enable_digit_out()
2086 		return !!REG_GET(DISPC_CONTROL, 0, 0);  in dispc_mgr_is_enabled()
2088 		return !!REG_GET(DISPC_CONTROL, 1, 1);  in dispc_mgr_is_enabled()
2110 	REG_FLD_MOD(DISPC_CONTROL, act_high ? 1 : 0, 29, 29);  in dispc_lcd_enable_signal_polarity()
2118 	REG_FLD_MOD(DISPC_CONTROL, enable ? 1 : 0, 28, 28);  in dispc_lcd_enable_signal()
2126 	REG_FLD_MOD(DISPC_CONTROL, enable ? 1 : 0, 27, 27);  in dispc_pck_free_enable()
2160 		REG_FLD_MOD(DISPC_CONTROL, mode, 3, 3);  in dispc_mgr_set_lcd_display_type()
2249 		REG_FLD_MOD(DISPC_CONTROL, code, 9, 8);  in dispc_mgr_set_tft_data_lines()
2275 	l = dispc_read_reg(DISPC_CONTROL);  in dispc_mgr_set_io_pad_mode()
2278 	dispc_write_reg(DISPC_CONTROL, l);  in dispc_mgr_set_io_pad_mode()
2286 		REG_FLD_MOD(DISPC_CONTROL, enable, 11, 11);  in dispc_mgr_enable_stallmode()
2619 	DUMPREG(DISPC_CONTROL);  in dispc_dump_regs()