Lines Matching refs:pllSSPLL_CNTL
610 rinfo->save_regs[43] = INPLL(pllSSPLL_CNTL); in radeon_pm_save_regs()
1562 OUTPLL(pllSSPLL_CNTL, 0xbf03); in radeon_pm_m10_disable_spread_spectrum()
1589 OUTPLL(pllSSPLL_CNTL, rinfo->save_regs[43] | 3); in radeon_pm_m10_enable_lvds_spread_spectrum()
1594 tmp = INPLL(pllSSPLL_CNTL); in radeon_pm_m10_enable_lvds_spread_spectrum()
1595 OUTPLL(pllSSPLL_CNTL, tmp & ~0x2); in radeon_pm_m10_enable_lvds_spread_spectrum()
1597 tmp = INPLL(pllSSPLL_CNTL); in radeon_pm_m10_enable_lvds_spread_spectrum()
1598 OUTPLL(pllSSPLL_CNTL, tmp & ~0x1); in radeon_pm_m10_enable_lvds_spread_spectrum()
2174 tmp = INPLL(pllSSPLL_CNTL); in radeon_reinitialize_M9P()
2176 OUTPLL(pllSSPLL_CNTL, tmp); in radeon_reinitialize_M9P()
2179 OUTPLL(pllSSPLL_CNTL, tmp); in radeon_reinitialize_M9P()
2182 OUTPLL(pllSSPLL_CNTL, tmp); in radeon_reinitialize_M9P()