Lines Matching refs:uint32_t
79 uint32_t Revision:8;
80 uint32_t InId:24;
82 uint32_t word;
88 uint32_t CmdRsp:16;
89 uint32_t Size:16;
91 uint32_t word;
111 uint32_t PortID;
119 uint32_t PortId; /* For RFT_ID requests */
122 uint32_t rsvd0:16;
123 uint32_t rsvd1:7;
124 uint32_t fcpReg:1; /* Type 8 */
125 uint32_t rsvd2:2;
126 uint32_t ipReg:1; /* Type 5 */
127 uint32_t rsvd3:5;
129 uint32_t rsvd0:16;
130 uint32_t fcpReg:1; /* Type 8 */
131 uint32_t rsvd1:7;
132 uint32_t rsvd3:5;
133 uint32_t ipReg:1; /* Type 5 */
134 uint32_t rsvd2:2;
137 uint32_t rsvd[7];
140 uint32_t PortId; /* For RNN_ID requests */
149 uint32_t port_id;
152 uint32_t PortId;
157 uint32_t PortId;
164 uint32_t PortId;
404 uint32_t r_a_tov; /* R_A_TOV must be in B.E. format */
407 uint32_t e_d_tov; /* E_D_TOV must be in B.E. format */
492 uint32_t word0;
511 uint32_t word1;
600 uint32_t lsRjtError;
651 uint32_t nPortId32; /* Access nPortId as a word */
701 uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */
703 uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */
773 uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */
775 uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */
777 uint32_t word3Reserved1; /* FC Parm Word 3, bit 0:31 */
781 uint32_t hardAL_PA;
784 uint32_t DID;
788 uint32_t Mflags:8;
789 uint32_t Odid:24;
799 uint32_t Rflags:8;
800 uint32_t Rdid:24;
812 uint32_t Fdid;
831 uint32_t unitType;
835 uint32_t physPort;
836 uint32_t attachedNodes;
863 uint32_t portNum;
871 uint32_t linkFailureCnt;
872 uint32_t lossSyncCnt;
873 uint32_t lossSignalCnt;
874 uint32_t primSeqErrCnt;
875 uint32_t invalidXmitWord;
876 uint32_t crcCnt;
880 uint32_t rls;
890 uint32_t linkFailureCnt;
891 uint32_t lossSyncCnt;
892 uint32_t lossSignalCnt;
893 uint32_t primSeqErrCnt;
894 uint32_t invalidXmitWord;
895 uint32_t crcCnt;
899 uint32_t rrq;
906 uint32_t rrq_exchg;
919 uint32_t ratov;
920 uint32_t edtov;
921 uint32_t qtov;
941 uint32_t maxsize;
942 uint32_t index;
946 uint32_t portNum;
947 uint32_t portID;
952 uint32_t listLen;
953 uint32_t index;
960 uint32_t word;
1065 uint32_t AttrType:16;
1066 uint32_t AttrLen:16;
1068 uint32_t word;
1078 uint32_t VendorSpecific;
1089 uint32_t SupportSpeed;
1090 uint32_t PortSpeed;
1091 uint32_t MaxFrameSize;
1094 uint32_t MaxCTPayloadLen;
1103 uint32_t EntryCnt; /* Number of HBA attribute entries */
1125 uint32_t EntryCnt;
1158 uint32_t HBA__Entry_Cnt; /* Number of Registered HBA Identifiers */
1166 uint32_t RPL_Entry_Cnt; /* Number of Registered Port Entries */
1276 uint32_t hostAtt; /* See definitions for Host Attention
1278 uint32_t chipAtt; /* See definitions for Chip Attention
1280 uint32_t hostStatus; /* See definitions for Host Status register */
1281 uint32_t hostControl; /* See definitions for Host Control register */
1282 uint32_t buiConfig; /* See definitions for BIU configuration
1614 uint32_t bdeAddress;
1616 uint32_t bdeReserved:4;
1617 uint32_t bdeAddrHigh:4;
1618 uint32_t bdeSize:24;
1620 uint32_t bdeSize:24;
1621 uint32_t bdeAddrHigh:4;
1622 uint32_t bdeReserved:4;
1628 uint32_t bdeFlags:8; /* BDL Flags */
1629 uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */
1631 uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */
1632 uint32_t bdeFlags:8; /* BDL Flags */
1635 uint32_t addrLow; /* Address 0:31 */
1636 uint32_t addrHigh; /* Address 32:63 */
1637 uint32_t ulpIoTag32; /* Can be used for 32 bit I/O Tag */
1667 uint32_t word0;
1674 uint32_t reftag; /* Reference Tag Value */
1675 uint32_t reftagtr; /* Reference Tag Translation Value */
1679 uint32_t word0;
1686 uint32_t word1;
1699 uint32_t word2;
1730 uint32_t word0;
1737 uint32_t addrHigh;
1738 uint32_t addrLow;
1745 uint32_t rsvd2:25;
1746 uint32_t acknowledgment:1;
1747 uint32_t version:1;
1748 uint32_t erase_or_prog:1;
1749 uint32_t update_flash:1;
1750 uint32_t update_ram:1;
1751 uint32_t method:1;
1752 uint32_t load_cmplt:1;
1754 uint32_t load_cmplt:1;
1755 uint32_t method:1;
1756 uint32_t update_ram:1;
1757 uint32_t update_flash:1;
1758 uint32_t erase_or_prog:1;
1759 uint32_t version:1;
1760 uint32_t acknowledgment:1;
1761 uint32_t rsvd2:25;
1764 uint32_t dl_to_adr_low;
1765 uint32_t dl_to_adr_high;
1766 uint32_t dl_len;
1768 uint32_t dl_from_mbx_offset;
1778 uint32_t rsvd1[3]; /* Read as all one's */
1779 uint32_t rsvd2; /* Read as all zero's */
1780 uint32_t portname[2]; /* N_PORT name */
1781 uint32_t nodename[2]; /* NODE name */
1784 uint32_t pref_DID:24;
1785 uint32_t hardAL_PA:8;
1787 uint32_t hardAL_PA:8;
1788 uint32_t pref_DID:24;
1791 uint32_t rsvd3[21]; /* Read as all one's */
1797 uint32_t rsvd1[3]; /* Must be all one's */
1798 uint32_t rsvd2; /* Must be all zero's */
1799 uint32_t portname[2]; /* N_PORT name */
1800 uint32_t nodename[2]; /* NODE name */
1803 uint32_t pref_DID:24;
1804 uint32_t hardAL_PA:8;
1806 uint32_t hardAL_PA:8;
1807 uint32_t pref_DID:24;
1810 uint32_t rsvd3[21]; /* Must be all one's */
1817 uint32_t rsvd1;
1832 uint32_t word1;
1837 uint32_t offset;
1845 uint32_t rsvd1:24;
1846 uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */
1848 uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */
1849 uint32_t rsvd1:24;
1874 uint32_t link_speed;
1888 uint32_t rsvd1;
1895 uint32_t cr:1;
1896 uint32_t ci:1;
1897 uint32_t cr_delay:6;
1898 uint32_t cr_count:8;
1899 uint32_t rsvd1:8;
1900 uint32_t MaxBBC:8;
1902 uint32_t MaxBBC:8;
1903 uint32_t rsvd1:8;
1904 uint32_t cr_count:8;
1905 uint32_t cr_delay:6;
1906 uint32_t ci:1;
1907 uint32_t cr:1;
1910 uint32_t myId;
1911 uint32_t rsvd2;
1912 uint32_t edtov;
1913 uint32_t arbtov;
1914 uint32_t ratov;
1915 uint32_t rttov;
1916 uint32_t altov;
1917 uint32_t crtov;
1918 uint32_t citov;
1920 uint32_t rrq_enable:1;
1921 uint32_t rrq_immed:1;
1922 uint32_t rsvd4:29;
1923 uint32_t ack0_enable:1;
1925 uint32_t ack0_enable:1;
1926 uint32_t rsvd4:29;
1927 uint32_t rrq_immed:1;
1928 uint32_t rrq_enable:1;
1951 uint32_t unused1:24;
1952 uint32_t numRing:8;
1954 uint32_t numRing:8;
1955 uint32_t unused1:24;
1959 uint32_t hbainit;
1966 uint32_t unused2:6;
1967 uint32_t recvSeq:1;
1968 uint32_t recvNotify:1;
1969 uint32_t numMask:8;
1970 uint32_t profile:8;
1971 uint32_t unused1:4;
1972 uint32_t ring:4;
1974 uint32_t ring:4;
1975 uint32_t unused1:4;
1976 uint32_t profile:8;
1977 uint32_t numMask:8;
1978 uint32_t recvNotify:1;
1979 uint32_t recvSeq:1;
1980 uint32_t unused2:6;
1997 uint32_t ring_no;
2004 uint32_t cr:1;
2005 uint32_t ci:1;
2006 uint32_t cr_delay:6;
2007 uint32_t cr_count:8;
2008 uint32_t InitBBC:8;
2009 uint32_t MaxBBC:8;
2011 uint32_t MaxBBC:8;
2012 uint32_t InitBBC:8;
2013 uint32_t cr_count:8;
2014 uint32_t cr_delay:6;
2015 uint32_t ci:1;
2016 uint32_t cr:1;
2020 uint32_t topology:8;
2021 uint32_t myDid:24;
2023 uint32_t myDid:24;
2024 uint32_t topology:8;
2029 uint32_t AR:1;
2030 uint32_t IR:1;
2031 uint32_t rsvd1:29;
2032 uint32_t ack0:1;
2034 uint32_t ack0:1;
2035 uint32_t rsvd1:29;
2036 uint32_t IR:1;
2037 uint32_t AR:1;
2040 uint32_t edtov;
2041 uint32_t arbtov;
2042 uint32_t ratov;
2043 uint32_t rttov;
2044 uint32_t altov;
2045 uint32_t lmt;
2053 uint32_t rsvd2;
2054 uint32_t rsvd3;
2055 uint32_t max_xri;
2056 uint32_t max_iocb;
2057 uint32_t max_rpi;
2058 uint32_t avail_xri;
2059 uint32_t avail_iocb;
2060 uint32_t avail_rpi;
2061 uint32_t max_vpi;
2062 uint32_t rsvd4;
2063 uint32_t rsvd5;
2064 uint32_t avail_vpi;
2071 uint32_t rsvd2:7;
2072 uint32_t recvNotify:1;
2073 uint32_t numMask:8;
2074 uint32_t profile:8;
2075 uint32_t rsvd1:4;
2076 uint32_t ring:4;
2078 uint32_t ring:4;
2079 uint32_t rsvd1:4;
2080 uint32_t profile:8;
2081 uint32_t numMask:8;
2082 uint32_t recvNotify:1;
2083 uint32_t rsvd2:7;
2121 uint32_t rsvd1;
2122 uint32_t rsvd2;
2141 uint32_t rsvd1:31;
2142 uint32_t clrCounters:1;
2146 uint32_t clrCounters:1;
2147 uint32_t rsvd1:31;
2152 uint32_t xmitByteCnt;
2153 uint32_t rcvByteCnt;
2154 uint32_t xmitFrameCnt;
2155 uint32_t rcvFrameCnt;
2156 uint32_t xmitSeqCnt;
2157 uint32_t rcvSeqCnt;
2158 uint32_t totalOrigExchanges;
2159 uint32_t totalRespExchanges;
2160 uint32_t rcvPbsyCnt;
2161 uint32_t rcvFbsyCnt;
2171 uint32_t rsvd2:8;
2172 uint32_t DID:24;
2176 uint32_t DID:24;
2177 uint32_t rsvd2:8;
2195 uint32_t rsvd2:8;
2196 uint32_t DID:24;
2197 uint32_t rsvd3:8;
2198 uint32_t SID:24;
2199 uint32_t rsvd4;
2205 uint32_t rsvd6:30;
2206 uint32_t si:1;
2207 uint32_t exchOrig:1;
2213 uint32_t DID:24;
2214 uint32_t rsvd2:8;
2215 uint32_t SID:24;
2216 uint32_t rsvd3:8;
2217 uint32_t rsvd4;
2223 uint32_t exchOrig:1;
2224 uint32_t si:1;
2225 uint32_t rsvd6:30;
2233 uint32_t cv:1;
2234 uint32_t rr:1;
2235 uint32_t rsvd2:2;
2236 uint32_t v3req:1;
2237 uint32_t v3rsp:1;
2238 uint32_t rsvd1:25;
2239 uint32_t rv:1;
2241 uint32_t rv:1;
2242 uint32_t rsvd1:25;
2243 uint32_t v3rsp:1;
2244 uint32_t v3req:1;
2245 uint32_t rsvd2:2;
2246 uint32_t rr:1;
2247 uint32_t cv:1;
2250 uint32_t biuRev;
2251 uint32_t smRev;
2253 uint32_t smFwRev;
2275 uint32_t endecRev;
2288 uint32_t postKernRev;
2289 uint32_t opFwRev;
2291 uint32_t sli1FwRev;
2293 uint32_t sli2FwRev;
2295 uint32_t sli3Feat;
2296 uint32_t RandomData[6];
2302 uint32_t rsvd1;
2303 uint32_t linkFailureCnt;
2304 uint32_t lossSyncCnt;
2306 uint32_t lossSignalCnt;
2307 uint32_t primSeqErrCnt;
2308 uint32_t invalidXmitWord;
2309 uint32_t crcCnt;
2310 uint32_t primSeqTimeout;
2311 uint32_t elasticOverrun;
2312 uint32_t arbTimeout;
2322 uint32_t rsvd2:8;
2323 uint32_t did:24;
2327 uint32_t did:24;
2328 uint32_t rsvd2:8;
2359 uint32_t word;
2368 uint32_t rsvd2;
2369 uint32_t rsvd3;
2370 uint32_t rsvd4;
2371 uint32_t rsvd5;
2377 uint32_t rsvd2;
2378 uint32_t rsvd3;
2379 uint32_t rsvd4;
2380 uint32_t rsvd5;
2389 uint32_t rsvd1;
2390 uint32_t rsvd2:7;
2391 uint32_t upd:1;
2392 uint32_t sid:24;
2393 uint32_t wwn[2];
2394 uint32_t rsvd5;
2398 uint32_t rsvd1;
2399 uint32_t sid:24;
2400 uint32_t upd:1;
2401 uint32_t rsvd2:7;
2402 uint32_t wwn[2];
2403 uint32_t rsvd5;
2411 uint32_t rsvd1;
2419 uint32_t rsvd3;
2420 uint32_t rsvd4;
2421 uint32_t rsvd5;
2434 uint32_t did;
2435 uint32_t rsvd2;
2436 uint32_t rsvd3;
2437 uint32_t rsvd4;
2438 uint32_t rsvd5;
2450 uint32_t eventTag; /* Event tag */
2451 uint32_t word2;
2470 uint32_t word3;
2489 uint32_t word7;
2508 uint32_t word8;
2539 uint32_t eventTag; /* Event tag */
2540 uint32_t rsvd1;
2547 uint32_t rsvd:25;
2548 uint32_t ra:1;
2549 uint32_t co:1;
2550 uint32_t cv:1;
2551 uint32_t type:4;
2552 uint32_t entry_index:16;
2553 uint32_t region_id:16;
2555 uint32_t type:4;
2556 uint32_t cv:1;
2557 uint32_t co:1;
2558 uint32_t ra:1;
2559 uint32_t rsvd:25;
2560 uint32_t region_id:16;
2561 uint32_t entry_index:16;
2564 uint32_t sli4_length;
2565 uint32_t word_cnt;
2566 uint32_t resp_offset;
2599 uint32_t signature;
2600 uint32_t rev;
2602 uint32_t resvd[66];
2610 uint32_t ver:4; /* Major Version */
2611 uint32_t rev:4; /* Revision */
2612 uint32_t lev:2; /* Level */
2613 uint32_t dist:2; /* Dist Type */
2614 uint32_t num:4; /* number after dist type */
2616 uint32_t num:4; /* number after dist type */
2617 uint32_t dist:2; /* Dist Type */
2618 uint32_t lev:2; /* Level */
2619 uint32_t rev:4; /* Revision */
2620 uint32_t ver:4; /* Major Version */
2630 uint32_t rsvd2:16;
2631 uint32_t type:8;
2632 uint32_t rsvd:1;
2633 uint32_t ra:1;
2634 uint32_t co:1;
2635 uint32_t cv:1;
2636 uint32_t req:4;
2637 uint32_t entry_length:16;
2638 uint32_t region_id:16;
2640 uint32_t req:4;
2641 uint32_t cv:1;
2642 uint32_t co:1;
2643 uint32_t ra:1;
2644 uint32_t rsvd:1;
2645 uint32_t type:8;
2646 uint32_t rsvd2:16;
2647 uint32_t region_id:16;
2648 uint32_t entry_length:16;
2651 uint32_t resp_info;
2652 uint32_t byte_cnt;
2653 uint32_t data_offset;
2675 uint32_t rsvd1 :7;
2676 uint32_t recvNotify :1; /* Receive Notification */
2677 uint32_t numMask :8; /* # Mask Entries */
2678 uint32_t profile :8; /* Selection Profile */
2679 uint32_t rsvd2 :8;
2681 uint32_t rsvd2 :8;
2682 uint32_t profile :8; /* Selection Profile */
2683 uint32_t numMask :8; /* # Mask Entries */
2684 uint32_t recvNotify :1; /* Receive Notification */
2685 uint32_t rsvd1 :7;
2689 uint32_t hbqId :16;
2690 uint32_t rsvd3 :12;
2691 uint32_t ringMask :4;
2693 uint32_t ringMask :4;
2694 uint32_t rsvd3 :12;
2695 uint32_t hbqId :16;
2699 uint32_t entry_count :16;
2700 uint32_t rsvd4 :8;
2701 uint32_t headerLen :8;
2703 uint32_t headerLen :8;
2704 uint32_t rsvd4 :8;
2705 uint32_t entry_count :16;
2708 uint32_t hbqaddrLow;
2709 uint32_t hbqaddrHigh;
2712 uint32_t rsvd5 :31;
2713 uint32_t logEntry :1;
2715 uint32_t logEntry :1;
2716 uint32_t rsvd5 :31;
2719 uint32_t rsvd6; /* w7 */
2720 uint32_t rsvd7; /* w8 */
2721 uint32_t rsvd8; /* w9 */
2727 uint32_t allprofiles[12];
2731 uint32_t seqlenoff :16;
2732 uint32_t maxlen :16;
2734 uint32_t maxlen :16;
2735 uint32_t seqlenoff :16;
2738 uint32_t rsvd1 :28;
2739 uint32_t seqlenbcnt :4;
2741 uint32_t seqlenbcnt :4;
2742 uint32_t rsvd1 :28;
2744 uint32_t rsvd[10];
2749 uint32_t seqlenoff :16;
2750 uint32_t maxlen :16;
2752 uint32_t maxlen :16;
2753 uint32_t seqlenoff :16;
2756 uint32_t cmdcodeoff :28;
2757 uint32_t rsvd1 :12;
2758 uint32_t seqlenbcnt :4;
2760 uint32_t seqlenbcnt :4;
2761 uint32_t rsvd1 :12;
2762 uint32_t cmdcodeoff :28;
2764 uint32_t cmdmatch[8];
2766 uint32_t rsvd[2];
2771 uint32_t seqlenoff :16;
2772 uint32_t maxlen :16;
2774 uint32_t maxlen :16;
2775 uint32_t seqlenoff :16;
2778 uint32_t cmdcodeoff :28;
2779 uint32_t rsvd1 :12;
2780 uint32_t seqlenbcnt :4;
2782 uint32_t seqlenbcnt :4;
2783 uint32_t rsvd1 :12;
2784 uint32_t cmdcodeoff :28;
2786 uint32_t cmdmatch[8];
2788 uint32_t rsvd[2];
2800 uint32_t cBE : 1;
2801 uint32_t cET : 1;
2802 uint32_t cHpcb : 1;
2803 uint32_t cMA : 1;
2804 uint32_t sli_mode : 4;
2805 uint32_t pcbLen : 24; /* bit 23:0 of memory based port
2808 uint32_t pcbLen : 24; /* bit 23:0 of memory based port
2810 uint32_t sli_mode : 4;
2811 uint32_t cMA : 1;
2812 uint32_t cHpcb : 1;
2813 uint32_t cET : 1;
2814 uint32_t cBE : 1;
2817 uint32_t pcbLow; /* bit 31:0 of memory based port config block */
2818 uint32_t pcbHigh; /* bit 63:32 of memory based port config block */
2819 uint32_t hbainit[5];
2821 uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */
2822 uint32_t rsvd : 31; /* least significant 31 bits of word 9 */
2824 uint32_t rsvd : 31; /* least significant 31 bits of word 9 */
2825 uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */
2829 uint32_t rsvd1 : 19; /* Reserved */
2830 uint32_t cdss : 1; /* Configure Data Security SLI */
2831 uint32_t casabt : 1; /* Configure async abts status notice */
2832 uint32_t rsvd2 : 2; /* Reserved */
2833 uint32_t cbg : 1; /* Configure BlockGuard */
2834 uint32_t cmv : 1; /* Configure Max VPIs */
2835 uint32_t ccrp : 1; /* Config Command Ring Polling */
2836 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
2837 uint32_t chbs : 1; /* Cofigure Host Backing store */
2838 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
2839 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
2840 uint32_t cmx : 1; /* Configure Max XRIs */
2841 uint32_t cmr : 1; /* Configure Max RPIs */
2843 uint32_t cmr : 1; /* Configure Max RPIs */
2844 uint32_t cmx : 1; /* Configure Max XRIs */
2845 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
2846 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
2847 uint32_t chbs : 1; /* Cofigure Host Backing store */
2848 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
2849 uint32_t ccrp : 1; /* Config Command Ring Polling */
2850 uint32_t cmv : 1; /* Configure Max VPIs */
2851 uint32_t cbg : 1; /* Configure BlockGuard */
2852 uint32_t rsvd2 : 2; /* Reserved */
2853 uint32_t casabt : 1; /* Configure async abts status notice */
2854 uint32_t cdss : 1; /* Configure Data Security SLI */
2855 uint32_t rsvd1 : 19; /* Reserved */
2858 uint32_t rsvd3 : 19; /* Reserved */
2859 uint32_t gdss : 1; /* Configure Data Security SLI */
2860 uint32_t gasabt : 1; /* Grant async abts status notice */
2861 uint32_t rsvd4 : 2; /* Reserved */
2862 uint32_t gbg : 1; /* Grant BlockGuard */
2863 uint32_t gmv : 1; /* Grant Max VPIs */
2864 uint32_t gcrp : 1; /* Grant Command Ring Polling */
2865 uint32_t gsah : 1; /* Grant Synchronous Abort Handling */
2866 uint32_t ghbs : 1; /* Grant Host Backing Store */
2867 uint32_t ginb : 1; /* Grant Interrupt Notification Block */
2868 uint32_t gerbm : 1; /* Grant ERBM Request */
2869 uint32_t gmx : 1; /* Grant Max XRIs */
2870 uint32_t gmr : 1; /* Grant Max RPIs */
2872 uint32_t gmr : 1; /* Grant Max RPIs */
2873 uint32_t gmx : 1; /* Grant Max XRIs */
2874 uint32_t gerbm : 1; /* Grant ERBM Request */
2875 uint32_t ginb : 1; /* Grant Interrupt Notification Block */
2876 uint32_t ghbs : 1; /* Grant Host Backing Store */
2877 uint32_t gsah : 1; /* Grant Synchronous Abort Handling */
2878 uint32_t gcrp : 1; /* Grant Command Ring Polling */
2879 uint32_t gmv : 1; /* Grant Max VPIs */
2880 uint32_t gbg : 1; /* Grant BlockGuard */
2881 uint32_t rsvd4 : 2; /* Reserved */
2882 uint32_t gasabt : 1; /* Grant async abts status notice */
2883 uint32_t gdss : 1; /* Configure Data Security SLI */
2884 uint32_t rsvd3 : 19; /* Reserved */
2888 uint32_t max_rpi : 16; /* Max RPIs Port should configure */
2889 uint32_t max_xri : 16; /* Max XRIs Port should configure */
2891 uint32_t max_xri : 16; /* Max XRIs Port should configure */
2892 uint32_t max_rpi : 16; /* Max RPIs Port should configure */
2896 uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */
2897 uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */
2899 uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */
2900 uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */
2903 uint32_t rsvd6; /* Reserved */
2906 uint32_t fips_rev : 3; /* FIPS Spec Revision */
2907 uint32_t fips_level : 4; /* FIPS Level */
2908 uint32_t sec_err : 9; /* security crypto error */
2909 uint32_t max_vpi : 16; /* Max number of virt N-Ports */
2911 uint32_t max_vpi : 16; /* Max number of virt N-Ports */
2912 uint32_t sec_err : 9; /* security crypto error */
2913 uint32_t fips_level : 4; /* FIPS Level */
2914 uint32_t fips_rev : 3; /* FIPS Spec Revision */
2922 uint32_t dfltMsgNum:8; /* Default message number */
2923 uint32_t rsvd1:11; /* Reserved */
2924 uint32_t NID:5; /* Number of secondary attention IDs */
2925 uint32_t rsvd2:5; /* Reserved */
2926 uint32_t dfltPresent:1; /* Default message number present */
2927 uint32_t addFlag:1; /* Add association flag */
2928 uint32_t reportFlag:1; /* Report association flag */
2930 uint32_t reportFlag:1; /* Report association flag */
2931 uint32_t addFlag:1; /* Add association flag */
2932 uint32_t dfltPresent:1; /* Default message number present */
2933 uint32_t rsvd2:5; /* Reserved */
2934 uint32_t NID:5; /* Number of secondary attention IDs */
2935 uint32_t rsvd1:11; /* Reserved */
2936 uint32_t dfltMsgNum:8; /* Default message number */
2938 uint32_t attentionConditions[2];
2942 uint32_t autoClearHA[2];
2944 uint32_t rsvd3:16;
2945 uint32_t autoClearID:16;
2947 uint32_t autoClearID:16;
2948 uint32_t rsvd3:16;
2950 uint32_t rsvd4;
2959 uint32_t cmdEntries;
2960 uint32_t cmdAddrLow;
2961 uint32_t cmdAddrHigh;
2963 uint32_t rspEntries;
2964 uint32_t rspAddrLow;
2965 uint32_t rspAddrHigh;
2970 uint32_t type:8;
2972 uint32_t feature:8;
2974 uint32_t rsvd:12;
2975 uint32_t maxRing:4;
2977 uint32_t maxRing:4;
2978 uint32_t rsvd:12;
2979 uint32_t feature:8;
2981 uint32_t type:8;
2985 uint32_t mailBoxSize;
2986 uint32_t mbAddrLow;
2987 uint32_t mbAddrHigh;
2989 uint32_t hgpAddrLow;
2990 uint32_t hgpAddrHigh;
2992 uint32_t pgpAddrLow;
2993 uint32_t pgpAddrHigh;
3000 uint32_t rsvd0:27;
3001 uint32_t discardFarp:1;
3002 uint32_t IPEnable:1;
3003 uint32_t nodeName:1;
3004 uint32_t portName:1;
3005 uint32_t filterEnable:1;
3007 uint32_t filterEnable:1;
3008 uint32_t portName:1;
3009 uint32_t nodeName:1;
3010 uint32_t IPEnable:1;
3011 uint32_t discardFarp:1;
3012 uint32_t rsvd:27;
3017 uint32_t rsvd1;
3018 uint32_t rsvd2;
3019 uint32_t rsvd3;
3020 uint32_t IPAddress;
3027 uint32_t rsvd:30;
3028 uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/
3030 uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/
3031 uint32_t rsvd:30;
3037 #define MAILBOX_CMD_SIZE (MAILBOX_CMD_WSIZE * sizeof(uint32_t))
3040 #define MAILBOX_EXT_SIZE (MAILBOX_EXT_WSIZE * sizeof(uint32_t))
3046 uint32_t varWords[MAILBOX_CMD_WSIZE - 1]; /* first word is type/
3103 uint32_t unused1[16];
3110 uint32_t reserved[8];
3111 uint32_t hbq_put[16];
3116 uint32_t hbq_get[16];
3266 uint32_t reserved;
3271 uint32_t reserved[4];
3278 uint32_t xrsqRo; /* Starting Relative Offset */
3288 uint32_t word4Rsvd:7;
3289 uint32_t fl:1;
3290 uint32_t myID:24;
3291 uint32_t word5Rsvd:8;
3292 uint32_t remoteID:24;
3294 uint32_t myID:24;
3295 uint32_t fl:1;
3296 uint32_t word4Rsvd:7;
3297 uint32_t remoteID:24;
3298 uint32_t word5Rsvd:8;
3305 uint32_t parmRo;
3308 uint32_t word5Rsvd:8;
3309 uint32_t remoteID:24;
3311 uint32_t remoteID:24;
3312 uint32_t word5Rsvd:8;
3318 uint32_t rsvd[3];
3319 uint32_t abortType;
3322 uint32_t parm;
3334 uint32_t rsvd[3];
3335 uint32_t abortType;
3336 uint32_t parm;
3337 uint32_t iotag32;
3342 uint32_t rsvd[4];
3343 uint32_t parmRo;
3345 uint32_t word5Rsvd:8;
3346 uint32_t remoteID:24;
3348 uint32_t remoteID:24;
3349 uint32_t word5Rsvd:8;
3357 uint32_t fcpi_parm;
3358 uint32_t fcpi_XRdy; /* transfer ready for IWRITE */
3364 uint32_t fcpt_Offset;
3365 uint32_t fcpt_Length; /* transfer ready for IWRITE */
3373 uint32_t xrsqRo; /* Starting Relative Offset */
3380 uint32_t rsvd1;
3381 uint32_t xrsqRo; /* Starting Relative Offset */
3389 uint32_t word4Rsvd:7;
3390 uint32_t fl:1;
3391 uint32_t myID:24;
3392 uint32_t word5Rsvd:8;
3393 uint32_t remoteID:24;
3395 uint32_t myID:24;
3396 uint32_t fl:1;
3397 uint32_t word4Rsvd:7;
3398 uint32_t remoteID:24;
3399 uint32_t word5Rsvd:8;
3406 uint32_t xrsqRo; /* Starting Relative Offset */
3413 uint32_t rcvd1;
3414 uint32_t parmRo;
3417 uint32_t word5Rsvd:8;
3418 uint32_t remoteID:24;
3420 uint32_t remoteID:24;
3421 uint32_t word5Rsvd:8;
3428 uint32_t hbq_1;
3429 uint32_t parmRo;
3431 uint32_t rctl:8;
3432 uint32_t type:8;
3433 uint32_t dfctl:8;
3434 uint32_t ls:1;
3435 uint32_t fs:1;
3436 uint32_t rsvd2:3;
3437 uint32_t si:1;
3438 uint32_t bc:1;
3439 uint32_t rsvd3:1;
3441 uint32_t rsvd3:1;
3442 uint32_t bc:1;
3443 uint32_t si:1;
3444 uint32_t rsvd2:3;
3445 uint32_t fs:1;
3446 uint32_t ls:1;
3447 uint32_t dfctl:8;
3448 uint32_t type:8;
3449 uint32_t rctl:8;
3456 uint32_t fcpi_parm;
3457 uint32_t fcpi_XRdy; /* transfer ready for IWRITE */
3463 uint32_t fcpt_Offset;
3464 uint32_t fcpt_Length; /* transfer ready for IWRITE */
3469 uint32_t rsvd[4];
3470 uint32_t param;
3500 uint32_t word10Rsvd;
3501 uint32_t acc_len; /* accumulated length */
3508 uint32_t buffer_tag;
3514 uint32_t rsvd;
3515 uint32_t rsvd1;
3519 uint32_t iotag64_low;
3520 uint32_t iotag64_high;
3521 uint32_t ebde_count;
3522 uint32_t rsvd;
3527 uint32_t filler[6]; /* word 8-13 in IOCB */
3528 uint32_t bghm; /* word 14 - BlockGuard High Water Mark */
3548 uint32_t bgstat; /* word 15 - BlockGuard Status */
3551 static inline uint32_t
3552 lpfc_bgs_get_bidir_bg_prof(uint32_t bgstat) in lpfc_bgs_get_bidir_bg_prof()
3558 static inline uint32_t
3559 lpfc_bgs_get_bidir_err_cond(uint32_t bgstat) in lpfc_bgs_get_bidir_err_cond()
3565 static inline uint32_t
3566 lpfc_bgs_get_bg_prof(uint32_t bgstat) in lpfc_bgs_get_bg_prof()
3572 static inline uint32_t
3573 lpfc_bgs_get_invalid_prof(uint32_t bgstat) in lpfc_bgs_get_invalid_prof()
3579 static inline uint32_t
3580 lpfc_bgs_get_uninit_dif_block(uint32_t bgstat) in lpfc_bgs_get_uninit_dif_block()
3586 static inline uint32_t
3587 lpfc_bgs_get_hi_water_mark_present(uint32_t bgstat) in lpfc_bgs_get_hi_water_mark_present()
3593 static inline uint32_t
3594 lpfc_bgs_get_reftag_err(uint32_t bgstat) in lpfc_bgs_get_reftag_err()
3600 static inline uint32_t
3601 lpfc_bgs_get_apptag_err(uint32_t bgstat) in lpfc_bgs_get_apptag_err()
3607 static inline uint32_t
3608 lpfc_bgs_get_guard_err(uint32_t bgstat) in lpfc_bgs_get_guard_err()
3616 uint32_t io_tag64_low;
3617 uint32_t io_tag64_high;
3629 uint32_t reserved4;
3661 uint32_t ulpWord[IOCB_WORD_SZ - 2]; /* generic 6 'words' */
3690 uint32_t ulpTimeout:8;
3691 uint32_t ulpXS:1;
3692 uint32_t ulpFCP2Rcvy:1;
3693 uint32_t ulpPU:2;
3694 uint32_t ulpIr:1;
3695 uint32_t ulpClass:3;
3696 uint32_t ulpCommand:8;
3697 uint32_t ulpStatus:4;
3698 uint32_t ulpBdeCount:2;
3699 uint32_t ulpLe:1;
3700 uint32_t ulpOwner:1; /* Low order bit word 7 */
3702 uint32_t ulpOwner:1; /* Low order bit word 7 */
3703 uint32_t ulpLe:1;
3704 uint32_t ulpBdeCount:2;
3705 uint32_t ulpStatus:4;
3706 uint32_t ulpCommand:8;
3707 uint32_t ulpClass:3;
3708 uint32_t ulpIr:1;
3709 uint32_t ulpPU:2;
3710 uint32_t ulpFCP2Rcvy:1;
3711 uint32_t ulpXS:1;
3712 uint32_t ulpTimeout:8;
3721 uint32_t sli3Words[24]; /* 96 extra bytes for SLI-3 */
3775 sizeof(uint32_t) * MAILBOX_EXT_WSIZE))
3783 uint32_t mbx_ext_words[MAILBOX_EXT_WSIZE];