293 void vxge_hw_channel_msix_mask(struct __vxge_hw_channel *channel, int msix_id)  in vxge_hw_channel_msix_mask()  argument
297 		(u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32),  in vxge_hw_channel_msix_mask()
298 		&channel->common_reg->set_msix_mask_vect[msix_id%4]);  in vxge_hw_channel_msix_mask()
311 vxge_hw_channel_msix_unmask(struct __vxge_hw_channel *channel, int msix_id)  in vxge_hw_channel_msix_unmask()  argument
315 		(u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32),  in vxge_hw_channel_msix_unmask()
316 		&channel->common_reg->clear_msix_mask_vect[msix_id%4]);  in vxge_hw_channel_msix_unmask()
329 void vxge_hw_channel_msix_clear(struct __vxge_hw_channel *channel, int msix_id)  in vxge_hw_channel_msix_clear()  argument
332 		(u32) vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32),  in vxge_hw_channel_msix_clear()
333 		&channel->common_reg->clr_msix_one_shot_vec[msix_id % 4]);  in vxge_hw_channel_msix_clear()
2298 vxge_hw_vpath_msix_mask(struct __vxge_hw_vpath_handle *vp, int msix_id)  in vxge_hw_vpath_msix_mask()  argument
2302 		(u32) vxge_bVALn(vxge_mBIT(msix_id  >> 2), 0, 32),  in vxge_hw_vpath_msix_mask()
2303 		&hldev->common_reg->set_msix_mask_vect[msix_id % 4]);  in vxge_hw_vpath_msix_mask()
2318 void vxge_hw_vpath_msix_clear(struct __vxge_hw_vpath_handle *vp, int msix_id)  in vxge_hw_vpath_msix_clear()  argument
2324 			(u32) vxge_bVALn(vxge_mBIT((msix_id >> 2)), 0, 32),  in vxge_hw_vpath_msix_clear()
2325 			&hldev->common_reg->clr_msix_one_shot_vec[msix_id % 4]);  in vxge_hw_vpath_msix_clear()
2328 			(u32) vxge_bVALn(vxge_mBIT((msix_id >> 2)), 0, 32),  in vxge_hw_vpath_msix_clear()
2329 			&hldev->common_reg->clear_msix_mask_vect[msix_id % 4]);  in vxge_hw_vpath_msix_clear()
2345 vxge_hw_vpath_msix_unmask(struct __vxge_hw_vpath_handle *vp, int msix_id)  in vxge_hw_vpath_msix_unmask()  argument
2349 			(u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32),  in vxge_hw_vpath_msix_unmask()
2350 			&hldev->common_reg->clear_msix_mask_vect[msix_id%4]);  in vxge_hw_vpath_msix_unmask()