101 static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
276 		IXGBE_WRITE_REG(hw, IXGBE_VTEICS, tx_ring->v_idx);  in ixgbevf_clean_tx_irq()
639 			ixgbevf_irq_enable_queues(adapter, rx_ring->v_idx);  in ixgbevf_clean_rxonly()
671 		enable_mask |= rx_ring->v_idx;  in ixgbevf_clean_rxonly_many()
708 	int i, j, q_vectors, v_idx, r_idx;  in ixgbevf_configure_msix()  local
717 	for (v_idx = 0; v_idx < q_vectors; v_idx++) {  in ixgbevf_configure_msix()
718 		q_vector = adapter->q_vector[v_idx];  in ixgbevf_configure_msix()
725 			ixgbevf_set_ivar(adapter, 0, j, v_idx);  in ixgbevf_configure_msix()
735 			ixgbevf_set_ivar(adapter, 1, j, v_idx);  in ixgbevf_configure_msix()
748 		ixgbevf_write_eitr(adapter, v_idx, q_vector->eitr);  in ixgbevf_configure_msix()
751 	ixgbevf_set_ivar(adapter, -1, 1, v_idx);  in ixgbevf_configure_msix()
834 static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,  in ixgbevf_write_eitr()  argument
847 	IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);  in ixgbevf_write_eitr()
855 	int i, r_idx, v_idx = q_vector->v_idx;  in ixgbevf_set_itr_msix()  local
912 		ixgbevf_write_eitr(adapter, v_idx, itr_reg);  in ixgbevf_set_itr_msix()
1014 	IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, rx_ring->v_idx);  in ixgbevf_msix_clean_rx()
1029 static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,  in map_vector_to_rxq()  argument
1032 	struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];  in map_vector_to_rxq()
1036 	a->rx_ring[r_idx].v_idx = 1 << v_idx;  in map_vector_to_rxq()
1039 static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,  in map_vector_to_txq()  argument
1042 	struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];  in map_vector_to_txq()
1046 	a->tx_ring[t_idx].v_idx = 1 << v_idx;  in map_vector_to_txq()
2068 		q_vector->v_idx = q_idx;  in ixgbevf_alloc_q_vectors()