1344 	u32 xmac_base;  in bnx2x_update_pfc_xmac()  local
1348 	xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;  in bnx2x_update_pfc_xmac()
1377 		REG_WR(bp, xmac_base + XMAC_REG_PAUSE_CTRL, pause_val);  in bnx2x_update_pfc_xmac()
1378 		REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL, pfc0_val);  in bnx2x_update_pfc_xmac()
1379 		REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL_HI, pfc1_val);  in bnx2x_update_pfc_xmac()
1385 	REG_WR(bp, xmac_base + XMAC_REG_PAUSE_CTRL, pause_val);  in bnx2x_update_pfc_xmac()
1386 	REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL, pfc0_val);  in bnx2x_update_pfc_xmac()
1387 	REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL_HI, pfc1_val);  in bnx2x_update_pfc_xmac()
1391 	REG_WR(bp, xmac_base + XMAC_REG_CTRL_SA_LO,  in bnx2x_update_pfc_xmac()
1396 	REG_WR(bp, xmac_base + XMAC_REG_CTRL_SA_HI,  in bnx2x_update_pfc_xmac()
1728 	u32 pfc_ctrl, xmac_base = (port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;  in bnx2x_xmac_disable()  local
1737 		pfc_ctrl = REG_RD(bp, xmac_base + XMAC_REG_PFC_CTRL_HI);  in bnx2x_xmac_disable()
1738 		REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL_HI,  in bnx2x_xmac_disable()
1740 		REG_WR(bp, xmac_base + XMAC_REG_PFC_CTRL_HI,  in bnx2x_xmac_disable()
1743 		REG_WR(bp, xmac_base + XMAC_REG_CTRL, 0);  in bnx2x_xmac_disable()
1750 	u32 val, xmac_base;  in bnx2x_xmac_enable()  local
1754 	xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;  in bnx2x_xmac_enable()
1770 	REG_WR(bp, xmac_base + XMAC_REG_RX_MAX_SIZE, 0x2710);  in bnx2x_xmac_enable()
1773 	REG_WR(bp, xmac_base + XMAC_REG_TX_CTRL, 0xC800);  in bnx2x_xmac_enable()
1784 	REG_WR(bp, xmac_base + XMAC_REG_CTRL, val);  in bnx2x_xmac_enable()
12245 		u32 xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;  in bnx2x_link_reset()  local
12249 			REG_WR(bp, xmac_base + XMAC_REG_CTRL,  in bnx2x_link_reset()