Lines Matching refs:pll_rate
1587 static unsigned long pll_rate(void __iomem *reg, unsigned long src_rate, in pll_rate() function
1642 rate = pll_rate(PRCM_PLLSOC0_FREQ, rate, clk_mgt[clock].branch); in clock_rate()
1644 rate = pll_rate(PRCM_PLLSOC1_FREQ, rate, clk_mgt[clock].branch); in clock_rate()
1646 rate = pll_rate(PRCM_PLLDDR_FREQ, rate, clk_mgt[clock].branch); in clock_rate()
1681 return pll_rate(PRCM_PLLDSI_FREQ, clock_rate(PRCMU_HDMICLK), in dsiclk_rate()
1706 return pll_rate(PRCM_PLLSOC0_FREQ, ROOT_CLOCK_RATE, PLL_RAW); in prcmu_clock_rate()
1708 return pll_rate(PRCM_PLLSOC1_FREQ, ROOT_CLOCK_RATE, PLL_RAW); in prcmu_clock_rate()
1710 return pll_rate(PRCM_PLLDDR_FREQ, ROOT_CLOCK_RATE, PLL_RAW); in prcmu_clock_rate()
1712 return pll_rate(PRCM_PLLDSI_FREQ, clock_rate(PRCMU_HDMICLK), in prcmu_clock_rate()
1728 return pll_rate(PRCM_PLLSOC0_FREQ, ROOT_CLOCK_RATE, branch); in clock_source_rate()
1730 return pll_rate(PRCM_PLLSOC1_FREQ, ROOT_CLOCK_RATE, branch); in clock_source_rate()
1732 return pll_rate(PRCM_PLLDDR_FREQ, ROOT_CLOCK_RATE, branch); in clock_source_rate()
1825 src_rate = pll_rate(PRCM_PLLDSI_FREQ, clock_rate(PRCMU_HDMICLK), in round_dsiclk_rate()
1960 div = clock_divider(pll_rate(PRCM_PLLDSI_FREQ, in set_dsiclk_rate()