57 static u8 ene_read_reg(struct ene_device *dev, u16 reg)  in ene_read_reg()  function
108 	chip_major = ene_read_reg(dev, ENE_ECVER_MAJOR);  in ene_hw_detect()
109 	chip_minor = ene_read_reg(dev, ENE_ECVER_MINOR);  in ene_hw_detect()
112 	hw_revision = ene_read_reg(dev, ENE_ECHV);  in ene_hw_detect()
113 	old_ver = ene_read_reg(dev, ENE_HW_VER_OLD);  in ene_hw_detect()
115 	dev->pll_freq = (ene_read_reg(dev, ENE_PLLFRH) << 4) +  in ene_hw_detect()
116 		(ene_read_reg(dev, ENE_PLLFRL) >> 4);  in ene_hw_detect()
154 	fw_reg1 = ene_read_reg(dev, ENE_FW1);  in ene_hw_detect()
155 	fw_reg2 = ene_read_reg(dev, ENE_FW2);  in ene_hw_detect()
205 	tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER);  in ene_rx_setup_hw_buffer()
206 	tmp |= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER+1) << 8;  in ene_rx_setup_hw_buffer()
209 	dev->extra_buf1_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 2);  in ene_rx_setup_hw_buffer()
211 	tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 3);  in ene_rx_setup_hw_buffer()
212 	tmp |= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 4) << 8;  in ene_rx_setup_hw_buffer()
215 	dev->extra_buf2_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 5);  in ene_rx_setup_hw_buffer()
275 		dev->w_pointer = ene_read_reg(dev, ENE_FW_RX_POINTER);  in ene_rx_read_hw_pointer()
277 		dev->w_pointer = ene_read_reg(dev, ENE_FW2)  in ene_rx_read_hw_pointer()
337 	int period = ene_read_reg(dev, ENE_CIRCAR_PRD);  in ene_rx_sense_carrier()
338 	int hperiod = ene_read_reg(dev, ENE_CIRCAR_HPRD);  in ene_rx_sense_carrier()
488 		reg_value = ene_read_reg(dev, ENE_IRQ) & 0xF0;  in ene_rx_enable()
579 	u8 conf1 = ene_read_reg(dev, ENE_CIRCFG);  in ene_tx_enable()
580 	u8 fwreg2 = ene_read_reg(dev, ENE_FW2);  in ene_tx_enable()
685 	fw_flags2 = ene_read_reg(dev, ENE_FW2);  in ene_irq_status()
688 		irq_status = ene_read_reg(dev, ENEB_IRQ_STATUS);  in ene_irq_status()
697 	irq_status = ene_read_reg(dev, ENE_IRQ);  in ene_irq_status()
712 	fw_flags1 = ene_read_reg(dev, ENE_FW1);  in ene_irq_status()
773 		hw_value = ene_read_reg(dev, reg);  in ene_isr()
780 			hw_value |= ene_read_reg(dev, reg + offset) << 8;  in ene_isr()