167 #define V_FW_RI_TPTE_VALID(x)		((x) << S_FW_RI_TPTE_VALID)  argument
168 #define G_FW_RI_TPTE_VALID(x)		\  argument
169     (((x) >> S_FW_RI_TPTE_VALID) & M_FW_RI_TPTE_VALID)
174 #define V_FW_RI_TPTE_STAGKEY(x)		((x) << S_FW_RI_TPTE_STAGKEY)  argument
175 #define G_FW_RI_TPTE_STAGKEY(x)		\  argument
176     (((x) >> S_FW_RI_TPTE_STAGKEY) & M_FW_RI_TPTE_STAGKEY)
180 #define V_FW_RI_TPTE_STAGSTATE(x)	((x) << S_FW_RI_TPTE_STAGSTATE)  argument
181 #define G_FW_RI_TPTE_STAGSTATE(x)	\  argument
182     (((x) >> S_FW_RI_TPTE_STAGSTATE) & M_FW_RI_TPTE_STAGSTATE)
187 #define V_FW_RI_TPTE_STAGTYPE(x)	((x) << S_FW_RI_TPTE_STAGTYPE)  argument
188 #define G_FW_RI_TPTE_STAGTYPE(x)	\  argument
189     (((x) >> S_FW_RI_TPTE_STAGTYPE) & M_FW_RI_TPTE_STAGTYPE)
193 #define V_FW_RI_TPTE_PDID(x)		((x) << S_FW_RI_TPTE_PDID)  argument
194 #define G_FW_RI_TPTE_PDID(x)		\  argument
195     (((x) >> S_FW_RI_TPTE_PDID) & M_FW_RI_TPTE_PDID)
199 #define V_FW_RI_TPTE_PERM(x)		((x) << S_FW_RI_TPTE_PERM)  argument
200 #define G_FW_RI_TPTE_PERM(x)		\  argument
201     (((x) >> S_FW_RI_TPTE_PERM) & M_FW_RI_TPTE_PERM)
205 #define V_FW_RI_TPTE_REMINVDIS(x)	((x) << S_FW_RI_TPTE_REMINVDIS)  argument
206 #define G_FW_RI_TPTE_REMINVDIS(x)	\  argument
207     (((x) >> S_FW_RI_TPTE_REMINVDIS) & M_FW_RI_TPTE_REMINVDIS)
212 #define V_FW_RI_TPTE_ADDRTYPE(x)	((x) << S_FW_RI_TPTE_ADDRTYPE)  argument
213 #define G_FW_RI_TPTE_ADDRTYPE(x)	\  argument
214     (((x) >> S_FW_RI_TPTE_ADDRTYPE) & M_FW_RI_TPTE_ADDRTYPE)
219 #define V_FW_RI_TPTE_MWBINDEN(x)	((x) << S_FW_RI_TPTE_MWBINDEN)  argument
220 #define G_FW_RI_TPTE_MWBINDEN(x)	\  argument
221     (((x) >> S_FW_RI_TPTE_MWBINDEN) & M_FW_RI_TPTE_MWBINDEN)
226 #define V_FW_RI_TPTE_PS(x)		((x) << S_FW_RI_TPTE_PS)  argument
227 #define G_FW_RI_TPTE_PS(x)		\  argument
228     (((x) >> S_FW_RI_TPTE_PS) & M_FW_RI_TPTE_PS)
232 #define V_FW_RI_TPTE_QPID(x)		((x) << S_FW_RI_TPTE_QPID)  argument
233 #define G_FW_RI_TPTE_QPID(x)		\  argument
234     (((x) >> S_FW_RI_TPTE_QPID) & M_FW_RI_TPTE_QPID)
238 #define V_FW_RI_TPTE_NOSNOOP(x)		((x) << S_FW_RI_TPTE_NOSNOOP)  argument
239 #define G_FW_RI_TPTE_NOSNOOP(x)		\  argument
240     (((x) >> S_FW_RI_TPTE_NOSNOOP) & M_FW_RI_TPTE_NOSNOOP)
245 #define V_FW_RI_TPTE_PBLADDR(x)		((x) << S_FW_RI_TPTE_PBLADDR)  argument
246 #define G_FW_RI_TPTE_PBLADDR(x)		\  argument
247     (((x) >> S_FW_RI_TPTE_PBLADDR) & M_FW_RI_TPTE_PBLADDR)
251 #define V_FW_RI_TPTE_DCA(x)		((x) << S_FW_RI_TPTE_DCA)  argument
252 #define G_FW_RI_TPTE_DCA(x)		\  argument
253     (((x) >> S_FW_RI_TPTE_DCA) & M_FW_RI_TPTE_DCA)
257 #define V_FW_RI_TPTE_MWBCNT_PSTAT(x)	\  argument
258     ((x) << S_FW_RI_TPTE_MWBCNT_PSTAG)
259 #define G_FW_RI_TPTE_MWBCNT_PSTAG(x)	\  argument
260     (((x) >> S_FW_RI_TPTE_MWBCNT_PSTAG) & M_FW_RI_TPTE_MWBCNT_PSTAG)
313 #define V_FW_RI_RES_WR_NRES(x)	((x) << S_FW_RI_RES_WR_NRES)  argument
314 #define G_FW_RI_RES_WR_NRES(x)	\  argument
315     (((x) >> S_FW_RI_RES_WR_NRES) & M_FW_RI_RES_WR_NRES)
319 #define V_FW_RI_RES_WR_FETCHSZM(x)	((x) << S_FW_RI_RES_WR_FETCHSZM)  argument
320 #define G_FW_RI_RES_WR_FETCHSZM(x)	\  argument
321     (((x) >> S_FW_RI_RES_WR_FETCHSZM) & M_FW_RI_RES_WR_FETCHSZM)
326 #define V_FW_RI_RES_WR_STATUSPGNS(x)	((x) << S_FW_RI_RES_WR_STATUSPGNS)  argument
327 #define G_FW_RI_RES_WR_STATUSPGNS(x)	\  argument
328     (((x) >> S_FW_RI_RES_WR_STATUSPGNS) & M_FW_RI_RES_WR_STATUSPGNS)
333 #define V_FW_RI_RES_WR_STATUSPGRO(x)	((x) << S_FW_RI_RES_WR_STATUSPGRO)  argument
334 #define G_FW_RI_RES_WR_STATUSPGRO(x)	\  argument
335     (((x) >> S_FW_RI_RES_WR_STATUSPGRO) & M_FW_RI_RES_WR_STATUSPGRO)
340 #define V_FW_RI_RES_WR_FETCHNS(x)	((x) << S_FW_RI_RES_WR_FETCHNS)  argument
341 #define G_FW_RI_RES_WR_FETCHNS(x)	\  argument
342     (((x) >> S_FW_RI_RES_WR_FETCHNS) & M_FW_RI_RES_WR_FETCHNS)
347 #define V_FW_RI_RES_WR_FETCHRO(x)	((x) << S_FW_RI_RES_WR_FETCHRO)  argument
348 #define G_FW_RI_RES_WR_FETCHRO(x)	\  argument
349     (((x) >> S_FW_RI_RES_WR_FETCHRO) & M_FW_RI_RES_WR_FETCHRO)
354 #define V_FW_RI_RES_WR_HOSTFCMODE(x)	((x) << S_FW_RI_RES_WR_HOSTFCMODE)  argument
355 #define G_FW_RI_RES_WR_HOSTFCMODE(x)	\  argument
356     (((x) >> S_FW_RI_RES_WR_HOSTFCMODE) & M_FW_RI_RES_WR_HOSTFCMODE)
360 #define V_FW_RI_RES_WR_CPRIO(x)	((x) << S_FW_RI_RES_WR_CPRIO)  argument
361 #define G_FW_RI_RES_WR_CPRIO(x)	\  argument
362     (((x) >> S_FW_RI_RES_WR_CPRIO) & M_FW_RI_RES_WR_CPRIO)
367 #define V_FW_RI_RES_WR_ONCHIP(x)	((x) << S_FW_RI_RES_WR_ONCHIP)  argument
368 #define G_FW_RI_RES_WR_ONCHIP(x)	\  argument
369     (((x) >> S_FW_RI_RES_WR_ONCHIP) & M_FW_RI_RES_WR_ONCHIP)
374 #define V_FW_RI_RES_WR_PCIECHN(x)	((x) << S_FW_RI_RES_WR_PCIECHN)  argument
375 #define G_FW_RI_RES_WR_PCIECHN(x)	\  argument
376     (((x) >> S_FW_RI_RES_WR_PCIECHN) & M_FW_RI_RES_WR_PCIECHN)
380 #define V_FW_RI_RES_WR_IQID(x)	((x) << S_FW_RI_RES_WR_IQID)  argument
381 #define G_FW_RI_RES_WR_IQID(x)	\  argument
382     (((x) >> S_FW_RI_RES_WR_IQID) & M_FW_RI_RES_WR_IQID)
386 #define V_FW_RI_RES_WR_DCAEN(x)	((x) << S_FW_RI_RES_WR_DCAEN)  argument
387 #define G_FW_RI_RES_WR_DCAEN(x)	\  argument
388     (((x) >> S_FW_RI_RES_WR_DCAEN) & M_FW_RI_RES_WR_DCAEN)
393 #define V_FW_RI_RES_WR_DCACPU(x)	((x) << S_FW_RI_RES_WR_DCACPU)  argument
394 #define G_FW_RI_RES_WR_DCACPU(x)	\  argument
395     (((x) >> S_FW_RI_RES_WR_DCACPU) & M_FW_RI_RES_WR_DCACPU)
399 #define V_FW_RI_RES_WR_FBMIN(x)	((x) << S_FW_RI_RES_WR_FBMIN)  argument
400 #define G_FW_RI_RES_WR_FBMIN(x)	\  argument
401     (((x) >> S_FW_RI_RES_WR_FBMIN) & M_FW_RI_RES_WR_FBMIN)
405 #define V_FW_RI_RES_WR_FBMAX(x)	((x) << S_FW_RI_RES_WR_FBMAX)  argument
406 #define G_FW_RI_RES_WR_FBMAX(x)	\  argument
407     (((x) >> S_FW_RI_RES_WR_FBMAX) & M_FW_RI_RES_WR_FBMAX)
411 #define V_FW_RI_RES_WR_CIDXFTHRESHO(x)	((x) << S_FW_RI_RES_WR_CIDXFTHRESHO)  argument
412 #define G_FW_RI_RES_WR_CIDXFTHRESHO(x)	\  argument
413     (((x) >> S_FW_RI_RES_WR_CIDXFTHRESHO) & M_FW_RI_RES_WR_CIDXFTHRESHO)
418 #define V_FW_RI_RES_WR_CIDXFTHRESH(x)	((x) << S_FW_RI_RES_WR_CIDXFTHRESH)  argument
419 #define G_FW_RI_RES_WR_CIDXFTHRESH(x)	\  argument
420     (((x) >> S_FW_RI_RES_WR_CIDXFTHRESH) & M_FW_RI_RES_WR_CIDXFTHRESH)
424 #define V_FW_RI_RES_WR_EQSIZE(x)	((x) << S_FW_RI_RES_WR_EQSIZE)  argument
425 #define G_FW_RI_RES_WR_EQSIZE(x)	\  argument
426     (((x) >> S_FW_RI_RES_WR_EQSIZE) & M_FW_RI_RES_WR_EQSIZE)
430 #define V_FW_RI_RES_WR_IQANDST(x)	((x) << S_FW_RI_RES_WR_IQANDST)  argument
431 #define G_FW_RI_RES_WR_IQANDST(x)	\  argument
432     (((x) >> S_FW_RI_RES_WR_IQANDST) & M_FW_RI_RES_WR_IQANDST)
437 #define V_FW_RI_RES_WR_IQANUS(x)	((x) << S_FW_RI_RES_WR_IQANUS)  argument
438 #define G_FW_RI_RES_WR_IQANUS(x)	\  argument
439     (((x) >> S_FW_RI_RES_WR_IQANUS) & M_FW_RI_RES_WR_IQANUS)
444 #define V_FW_RI_RES_WR_IQANUD(x)	((x) << S_FW_RI_RES_WR_IQANUD)  argument
445 #define G_FW_RI_RES_WR_IQANUD(x)	\  argument
446     (((x) >> S_FW_RI_RES_WR_IQANUD) & M_FW_RI_RES_WR_IQANUD)
450 #define V_FW_RI_RES_WR_IQANDSTINDEX(x)	((x) << S_FW_RI_RES_WR_IQANDSTINDEX)  argument
451 #define G_FW_RI_RES_WR_IQANDSTINDEX(x)	\  argument
452     (((x) >> S_FW_RI_RES_WR_IQANDSTINDEX) & M_FW_RI_RES_WR_IQANDSTINDEX)
456 #define V_FW_RI_RES_WR_IQDROPRSS(x)	((x) << S_FW_RI_RES_WR_IQDROPRSS)  argument
457 #define G_FW_RI_RES_WR_IQDROPRSS(x)	\  argument
458     (((x) >> S_FW_RI_RES_WR_IQDROPRSS) & M_FW_RI_RES_WR_IQDROPRSS)
463 #define V_FW_RI_RES_WR_IQGTSMODE(x)	((x) << S_FW_RI_RES_WR_IQGTSMODE)  argument
464 #define G_FW_RI_RES_WR_IQGTSMODE(x)	\  argument
465     (((x) >> S_FW_RI_RES_WR_IQGTSMODE) & M_FW_RI_RES_WR_IQGTSMODE)
470 #define V_FW_RI_RES_WR_IQPCIECH(x)	((x) << S_FW_RI_RES_WR_IQPCIECH)  argument
471 #define G_FW_RI_RES_WR_IQPCIECH(x)	\  argument
472     (((x) >> S_FW_RI_RES_WR_IQPCIECH) & M_FW_RI_RES_WR_IQPCIECH)
476 #define V_FW_RI_RES_WR_IQDCAEN(x)	((x) << S_FW_RI_RES_WR_IQDCAEN)  argument
477 #define G_FW_RI_RES_WR_IQDCAEN(x)	\  argument
478     (((x) >> S_FW_RI_RES_WR_IQDCAEN) & M_FW_RI_RES_WR_IQDCAEN)
483 #define V_FW_RI_RES_WR_IQDCACPU(x)	((x) << S_FW_RI_RES_WR_IQDCACPU)  argument
484 #define G_FW_RI_RES_WR_IQDCACPU(x)	\  argument
485     (((x) >> S_FW_RI_RES_WR_IQDCACPU) & M_FW_RI_RES_WR_IQDCACPU)
489 #define V_FW_RI_RES_WR_IQINTCNTTHRESH(x)	\  argument
490     ((x) << S_FW_RI_RES_WR_IQINTCNTTHRESH)
491 #define G_FW_RI_RES_WR_IQINTCNTTHRESH(x)	\  argument
492     (((x) >> S_FW_RI_RES_WR_IQINTCNTTHRESH) & M_FW_RI_RES_WR_IQINTCNTTHRESH)
496 #define V_FW_RI_RES_WR_IQO(x)	((x) << S_FW_RI_RES_WR_IQO)  argument
497 #define G_FW_RI_RES_WR_IQO(x)	\  argument
498     (((x) >> S_FW_RI_RES_WR_IQO) & M_FW_RI_RES_WR_IQO)
503 #define V_FW_RI_RES_WR_IQCPRIO(x)	((x) << S_FW_RI_RES_WR_IQCPRIO)  argument
504 #define G_FW_RI_RES_WR_IQCPRIO(x)	\  argument
505     (((x) >> S_FW_RI_RES_WR_IQCPRIO) & M_FW_RI_RES_WR_IQCPRIO)
510 #define V_FW_RI_RES_WR_IQESIZE(x)	((x) << S_FW_RI_RES_WR_IQESIZE)  argument
511 #define G_FW_RI_RES_WR_IQESIZE(x)	\  argument
512     (((x) >> S_FW_RI_RES_WR_IQESIZE) & M_FW_RI_RES_WR_IQESIZE)
516 #define V_FW_RI_RES_WR_IQNS(x)	((x) << S_FW_RI_RES_WR_IQNS)  argument
517 #define G_FW_RI_RES_WR_IQNS(x)	\  argument
518     (((x) >> S_FW_RI_RES_WR_IQNS) & M_FW_RI_RES_WR_IQNS)
523 #define V_FW_RI_RES_WR_IQRO(x)	((x) << S_FW_RI_RES_WR_IQRO)  argument
524 #define G_FW_RI_RES_WR_IQRO(x)	\  argument
525     (((x) >> S_FW_RI_RES_WR_IQRO) & M_FW_RI_RES_WR_IQRO)
567 #define V_FW_RI_SEND_WR_SENDOP(x)	((x) << S_FW_RI_SEND_WR_SENDOP)  argument
568 #define G_FW_RI_SEND_WR_SENDOP(x)	\  argument
569     (((x) >> S_FW_RI_SEND_WR_SENDOP) & M_FW_RI_SEND_WR_SENDOP)
617 #define V_FW_RI_BIND_MW_WR_QPBINDE(x)	((x) << S_FW_RI_BIND_MW_WR_QPBINDE)  argument
618 #define G_FW_RI_BIND_MW_WR_QPBINDE(x)	\  argument
619     (((x) >> S_FW_RI_BIND_MW_WR_QPBINDE) & M_FW_RI_BIND_MW_WR_QPBINDE)
624 #define V_FW_RI_BIND_MW_WR_NS(x)	((x) << S_FW_RI_BIND_MW_WR_NS)  argument
625 #define G_FW_RI_BIND_MW_WR_NS(x)	\  argument
626     (((x) >> S_FW_RI_BIND_MW_WR_NS) & M_FW_RI_BIND_MW_WR_NS)
631 #define V_FW_RI_BIND_MW_WR_DCACPU(x)	((x) << S_FW_RI_BIND_MW_WR_DCACPU)  argument
632 #define G_FW_RI_BIND_MW_WR_DCACPU(x)	\  argument
633     (((x) >> S_FW_RI_BIND_MW_WR_DCACPU) & M_FW_RI_BIND_MW_WR_DCACPU)
654 #define V_FW_RI_FR_NSMR_WR_QPBINDE(x)	((x) << S_FW_RI_FR_NSMR_WR_QPBINDE)  argument
655 #define G_FW_RI_FR_NSMR_WR_QPBINDE(x)	\  argument
656     (((x) >> S_FW_RI_FR_NSMR_WR_QPBINDE) & M_FW_RI_FR_NSMR_WR_QPBINDE)
661 #define V_FW_RI_FR_NSMR_WR_NS(x)	((x) << S_FW_RI_FR_NSMR_WR_NS)  argument
662 #define G_FW_RI_FR_NSMR_WR_NS(x)	\  argument
663     (((x) >> S_FW_RI_FR_NSMR_WR_NS) & M_FW_RI_FR_NSMR_WR_NS)
668 #define V_FW_RI_FR_NSMR_WR_DCACPU(x)	((x) << S_FW_RI_FR_NSMR_WR_DCACPU)  argument
669 #define G_FW_RI_FR_NSMR_WR_DCACPU(x)	\  argument
670     (((x) >> S_FW_RI_FR_NSMR_WR_DCACPU) & M_FW_RI_FR_NSMR_WR_DCACPU)
745 #define V_FW_RI_WR_MPAREQBIT(x)	((x) << S_FW_RI_WR_MPAREQBIT)  argument
746 #define G_FW_RI_WR_MPAREQBIT(x)	\  argument
747     (((x) >> S_FW_RI_WR_MPAREQBIT) & M_FW_RI_WR_MPAREQBIT)
752 #define V_FW_RI_WR_P2PTYPE(x)	((x) << S_FW_RI_WR_P2PTYPE)  argument
753 #define G_FW_RI_WR_P2PTYPE(x)	\  argument
754     (((x) >> S_FW_RI_WR_P2PTYPE) & M_FW_RI_WR_P2PTYPE)
788 #define V_SYN_RX_CHAN(x) ((x) << S_SYN_RX_CHAN)  argument
789 #define G_SYN_RX_CHAN(x) (((x) >> S_SYN_RX_CHAN) & M_SYN_RX_CHAN)  argument
793 #define V_TCP_HDR_LEN(x) ((x) << S_TCP_HDR_LEN)  argument
794 #define G_TCP_HDR_LEN(x) (((x) >> S_TCP_HDR_LEN) & M_TCP_HDR_LEN)  argument
798 #define V_IP_HDR_LEN(x) ((x) << S_IP_HDR_LEN)  argument
799 #define G_IP_HDR_LEN(x) (((x) >> S_IP_HDR_LEN) & M_IP_HDR_LEN)  argument
803 #define V_ETH_HDR_LEN(x) ((x) << S_ETH_HDR_LEN)  argument
804 #define G_ETH_HDR_LEN(x) (((x) >> S_ETH_HDR_LEN) & M_ETH_HDR_LEN)  argument
809 #define V_SYN_MAC_IDX(x) ((x) << S_SYN_MAC_IDX)  argument
810 #define G_SYN_MAC_IDX(x) (((x) >> S_SYN_MAC_IDX) & M_SYN_MAC_IDX)  argument
813 #define V_SYN_XACT_MATCH(x) ((x) << S_SYN_XACT_MATCH)  argument
818 #define V_SYN_INTF(x) ((x) << S_SYN_INTF)  argument
819 #define G_SYN_INTF(x) (((x) >> S_SYN_INTF) & M_SYN_INTF)  argument
828 #define V_ULPTX_NSGE(x) ((x) << S_ULPTX_NSGE)  argument
832 #define V_RX_DACK_MODE(x) ((x) << S_RX_DACK_MODE)  argument
833 #define G_RX_DACK_MODE(x) (((x) >> S_RX_DACK_MODE) & M_RX_DACK_MODE)  argument
836 #define V_RX_DACK_CHANGE(x) ((x) << S_RX_DACK_CHANGE)  argument