47 			(ioread32(I2C_REG_CTL(data)) & mcntrl_reset)) {  in wait_reset()
100 			ioread32(I2C_REG_CTL(alg_data)),  in i2c_pnx_start()
193 			iowrite32(ioread32(I2C_REG_CTL(alg_data)) &  in i2c_pnx_master_xmit()
195 				  I2C_REG_CTL(alg_data));  in i2c_pnx_master_xmit()
210 		iowrite32(ioread32(I2C_REG_CTL(alg_data)) &  in i2c_pnx_master_xmit()
212 			  I2C_REG_CTL(alg_data));  in i2c_pnx_master_xmit()
259 			ctl = ioread32(I2C_REG_CTL(alg_data));  in i2c_pnx_master_rcv()
262 			iowrite32(ctl, I2C_REG_CTL(alg_data));  in i2c_pnx_master_rcv()
291 			ctl = ioread32(I2C_REG_CTL(alg_data));  in i2c_pnx_master_rcv()
294 			iowrite32(ctl, I2C_REG_CTL(alg_data));  in i2c_pnx_master_rcv()
317 		ioread32(I2C_REG_CTL(alg_data)),  in i2c_pnx_interrupt()
327 		ctl = ioread32(I2C_REG_CTL(alg_data));  in i2c_pnx_interrupt()
330 		iowrite32(ctl, I2C_REG_CTL(alg_data));  in i2c_pnx_interrupt()
343 		ctl = ioread32(I2C_REG_CTL(alg_data));  in i2c_pnx_interrupt()
346 		iowrite32(ctl, I2C_REG_CTL(alg_data));  in i2c_pnx_interrupt()
380 		 ioread32(I2C_REG_CTL(alg_data)));  in i2c_pnx_interrupt()
393 		ioread32(I2C_REG_CTL(alg_data)));  in i2c_pnx_timeout()
396 	ctl = ioread32(I2C_REG_CTL(alg_data));  in i2c_pnx_timeout()
398 	iowrite32(ctl, I2C_REG_CTL(alg_data));  in i2c_pnx_timeout()
401 	iowrite32(ctl, I2C_REG_CTL(alg_data));  in i2c_pnx_timeout()
415 		iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,  in bus_reset_if_active()
416 			  I2C_REG_CTL(alg_data));  in bus_reset_if_active()
422 		iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,  in bus_reset_if_active()
423 			  I2C_REG_CTL(alg_data));  in bus_reset_if_active()
426 		iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,  in bus_reset_if_active()
427 			  I2C_REG_CTL(alg_data));  in bus_reset_if_active()
485 		iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_afie |  in i2c_pnx_xfer()
487 			  I2C_REG_CTL(alg_data));  in i2c_pnx_xfer()
646 	iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));  in i2c_pnx_probe()