1108 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1118 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1128 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1138 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1148 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in si_tiling_mode_table_init()
1158 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in si_tiling_mode_table_init()
1168 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in si_tiling_mode_table_init()
1178 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1188 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in si_tiling_mode_table_init()
1198 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in si_tiling_mode_table_init()
1208 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1218 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in si_tiling_mode_table_init()
1228 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in si_tiling_mode_table_init()
1238 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in si_tiling_mode_table_init()
1248 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1258 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in si_tiling_mode_table_init()
1268 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in si_tiling_mode_table_init()
1278 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in si_tiling_mode_table_init()
1288 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1298 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1308 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in si_tiling_mode_table_init()
1318 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in si_tiling_mode_table_init()
1328 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in si_tiling_mode_table_init()
1347 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1357 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1367 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1377 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1387 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in si_tiling_mode_table_init()
1397 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in si_tiling_mode_table_init()
1407 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in si_tiling_mode_table_init()
1417 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1427 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in si_tiling_mode_table_init()
1437 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in si_tiling_mode_table_init()
1447 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1457 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in si_tiling_mode_table_init()
1467 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in si_tiling_mode_table_init()
1477 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in si_tiling_mode_table_init()
1487 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1497 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in si_tiling_mode_table_init()
1507 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in si_tiling_mode_table_init()
1517 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in si_tiling_mode_table_init()
1527 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1537 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in si_tiling_mode_table_init()
1547 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in si_tiling_mode_table_init()
1557 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in si_tiling_mode_table_init()
1567 						 BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in si_tiling_mode_table_init()