57 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8xxx_gpio_save_regs()  local
59 	mpc8xxx_gc->data = in_be32(mm->regs + GPIO_DAT);  in mpc8xxx_gpio_save_regs()
71 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8572_gpio_get()  local
77 	out_shadow = mpc8xxx_gc->data & out_mask;  in mpc8572_gpio_get()
92 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8xxx_gpio_set()  local
95 	spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_set()
98 		mpc8xxx_gc->data |= mpc8xxx_gpio2mask(gpio);  in mpc8xxx_gpio_set()
100 		mpc8xxx_gc->data &= ~mpc8xxx_gpio2mask(gpio);  in mpc8xxx_gpio_set()
102 	out_be32(mm->regs + GPIO_DAT, mpc8xxx_gc->data);  in mpc8xxx_gpio_set()
104 	spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_set()
110 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8xxx_gpio_dir_in()  local
113 	spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_dir_in()
117 	spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_dir_in()
125 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8xxx_gpio_dir_out()  local
130 	spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_dir_out()
134 	spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_gpio_dir_out()
151 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);  in mpc8xxx_gpio_to_irq()  local
153 	if (mpc8xxx_gc->irq && offset < MPC8XXX_GPIO_PINS)  in mpc8xxx_gpio_to_irq()
154 		return irq_create_mapping(mpc8xxx_gc->irq, offset);  in mpc8xxx_gpio_to_irq()
161 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);  in mpc8xxx_gpio_irq_cascade()  local
163 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc8xxx_gpio_irq_cascade()
168 		generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq,  in mpc8xxx_gpio_irq_cascade()
176 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);  in mpc8xxx_irq_unmask()  local
177 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc8xxx_irq_unmask()
180 	spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_unmask()
184 	spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_unmask()
189 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);  in mpc8xxx_irq_mask()  local
190 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc8xxx_irq_mask()
193 	spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_mask()
197 	spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_mask()
202 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);  in mpc8xxx_irq_ack()  local
203 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc8xxx_irq_ack()
210 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);  in mpc8xxx_irq_set_type()  local
211 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc8xxx_irq_set_type()
216 		spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_set_type()
219 		spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_set_type()
223 		spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_set_type()
226 		spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc8xxx_irq_set_type()
238 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);  in mpc512x_irq_set_type()  local
239 	struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;  in mpc512x_irq_set_type()
256 		spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
258 		spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
263 		spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
265 		spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
269 		spin_lock_irqsave(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
271 		spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);  in mpc512x_irq_set_type()
292 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = h->host_data;  in mpc8xxx_gpio_irq_map()  local
294 	if (mpc8xxx_gc->of_dev_id_data)  in mpc8xxx_gpio_irq_map()
295 		mpc8xxx_irq_chip.irq_set_type = mpc8xxx_gc->of_dev_id_data;  in mpc8xxx_gpio_irq_map()
321 	struct mpc8xxx_gpio_chip *mpc8xxx_gc;  in mpc8xxx_add_controller()  local
328 	mpc8xxx_gc = kzalloc(sizeof(*mpc8xxx_gc), GFP_KERNEL);  in mpc8xxx_add_controller()
329 	if (!mpc8xxx_gc) {  in mpc8xxx_add_controller()
334 	spin_lock_init(&mpc8xxx_gc->lock);  in mpc8xxx_add_controller()
336 	mm_gc = &mpc8xxx_gc->mm_gc;  in mpc8xxx_add_controller()
357 	mpc8xxx_gc->irq = irq_domain_add_linear(np, MPC8XXX_GPIO_PINS,  in mpc8xxx_add_controller()
358 					&mpc8xxx_gpio_irq_ops, mpc8xxx_gc);  in mpc8xxx_add_controller()
359 	if (!mpc8xxx_gc->irq)  in mpc8xxx_add_controller()
364 		mpc8xxx_gc->of_dev_id_data = id->data;  in mpc8xxx_add_controller()
370 	irq_set_handler_data(hwirq, mpc8xxx_gc);  in mpc8xxx_add_controller()
379 	kfree(mpc8xxx_gc);  in mpc8xxx_add_controller()