Lines Matching refs:SGINT_CPU
28 #define SGINT_CPU MIPS_CPU_IRQ_BASE /* MIPS CPU define 8 interrupt sources */ macro
29 #define SGINT_LOCAL0 (SGINT_CPU+8) /* 8 local0 irq levels */
30 #define SGINT_LOCAL1 (SGINT_CPU+16) /* 8 local1 irq levels */
31 #define SGINT_LOCAL2 (SGINT_CPU+24) /* 8 local2 vectored irq levels */
32 #define SGINT_LOCAL3 (SGINT_CPU+32) /* 8 local3 vectored irq levels */
33 #define SGINT_END (SGINT_CPU+40) /* End of 'spaces' */
39 #define SGI_SOFT_0_IRQ SGINT_CPU + 0
40 #define SGI_SOFT_1_IRQ SGINT_CPU + 1
41 #define SGI_LOCAL_0_IRQ SGINT_CPU + 2
42 #define SGI_LOCAL_1_IRQ SGINT_CPU + 3
43 #define SGI_8254_0_IRQ SGINT_CPU + 4
44 #define SGI_8254_1_IRQ SGINT_CPU + 5
45 #define SGI_BUSERR_IRQ SGINT_CPU + 6
46 #define SGI_TIMER_IRQ SGINT_CPU + 7