40 	u32 div;  in ar71xx_clocks_init()  local
46 	div = ((pll >> AR71XX_PLL_DIV_SHIFT) & AR71XX_PLL_DIV_MASK) + 1;  in ar71xx_clocks_init()
47 	freq = div * ath79_ref_clk.rate;  in ar71xx_clocks_init()
49 	div = ((pll >> AR71XX_CPU_DIV_SHIFT) & AR71XX_CPU_DIV_MASK) + 1;  in ar71xx_clocks_init()
50 	ath79_cpu_clk.rate = freq / div;  in ar71xx_clocks_init()
52 	div = ((pll >> AR71XX_DDR_DIV_SHIFT) & AR71XX_DDR_DIV_MASK) + 1;  in ar71xx_clocks_init()
53 	ath79_ddr_clk.rate = freq / div;  in ar71xx_clocks_init()
55 	div = (((pll >> AR71XX_AHB_DIV_SHIFT) & AR71XX_AHB_DIV_MASK) + 1) * 2;  in ar71xx_clocks_init()
56 	ath79_ahb_clk.rate = ath79_cpu_clk.rate / div;  in ar71xx_clocks_init()
66 	u32 div;  in ar724x_clocks_init()  local
71 	div = ((pll >> AR724X_PLL_DIV_SHIFT) & AR724X_PLL_DIV_MASK);  in ar724x_clocks_init()
72 	freq = div * ath79_ref_clk.rate;  in ar724x_clocks_init()
74 	div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK);  in ar724x_clocks_init()
75 	freq *= div;  in ar724x_clocks_init()
79 	div = ((pll >> AR724X_DDR_DIV_SHIFT) & AR724X_DDR_DIV_MASK) + 1;  in ar724x_clocks_init()
80 	ath79_ddr_clk.rate = freq / div;  in ar724x_clocks_init()
82 	div = (((pll >> AR724X_AHB_DIV_SHIFT) & AR724X_AHB_DIV_MASK) + 1) * 2;  in ar724x_clocks_init()
83 	ath79_ahb_clk.rate = ath79_cpu_clk.rate / div;  in ar724x_clocks_init()
93 	u32 div;  in ar913x_clocks_init()  local
98 	div = ((pll >> AR913X_PLL_DIV_SHIFT) & AR913X_PLL_DIV_MASK);  in ar913x_clocks_init()
99 	freq = div * ath79_ref_clk.rate;  in ar913x_clocks_init()
103 	div = ((pll >> AR913X_DDR_DIV_SHIFT) & AR913X_DDR_DIV_MASK) + 1;  in ar913x_clocks_init()
104 	ath79_ddr_clk.rate = freq / div;  in ar913x_clocks_init()
106 	div = (((pll >> AR913X_AHB_DIV_SHIFT) & AR913X_AHB_DIV_MASK) + 1) * 2;  in ar913x_clocks_init()
107 	ath79_ahb_clk.rate = ath79_cpu_clk.rate / div;  in ar913x_clocks_init()