Lines Matching refs:entry1
347 volatile unsigned long *entry1, *entry2; in update_mmu_cache() local
364 entry1 = (unsigned long *)ITLB_BASE; in update_mmu_cache()
366 if (*entry1++ == vaddr) { in update_mmu_cache()
367 set_tlb_data(entry1, pte_data); in update_mmu_cache()
370 entry1++; in update_mmu_cache()
400 : "=&r" (entry1), "=&r" (entry2) in update_mmu_cache()
407 if ((!inst && entry2 >= DTLB_END) || (inst && entry1 >= ITLB_END)) in update_mmu_cache()
429 entry1 = entry2 + (((*entry_dat - 1) & TLB_MASK) << 1); in update_mmu_cache()
432 if (!(entry1[1] & 2)) /* Valid bit check */ in update_mmu_cache()
435 if (entry1 != entry2) in update_mmu_cache()
436 entry1 -= 2; in update_mmu_cache()
438 entry1 += TLB_MASK << 1; in update_mmu_cache()
442 entry1 = entry2 + (*entry_dat << 1); in update_mmu_cache()
445 *entry1++ = vaddr; /* Set TLB tag */ in update_mmu_cache()
446 set_tlb_data(entry1, pte_data); in update_mmu_cache()