Lines Matching refs:IO_STATE
19 #define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\
20 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk)
387 move.d IO_STATE (R_EXT_DMA_0_CMD, cnt, enable) \
388 | IO_STATE (R_EXT_DMA_0_CMD, rqpol, ahigh) \
389 | IO_STATE (R_EXT_DMA_0_CMD, apol, ahigh) \
390 | IO_STATE (R_EXT_DMA_0_CMD, rq_ack, burst) \
391 | IO_STATE (R_EXT_DMA_0_CMD, wid, word) \
392 | IO_STATE (R_EXT_DMA_0_CMD, dir, output) \
393 | IO_STATE (R_EXT_DMA_0_CMD, run, stop) \
399 moveq IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
403 cmp.b IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
409 moveq IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
413 cmp.b IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
424 or.d IO_STATE (R_GEN_CONFIG, ser2, select),$r0
426 or.d IO_STATE (R_GEN_CONFIG, ser2, disable),$r0
430 or.d IO_STATE (R_GEN_CONFIG, scsi0, disable) \
431 | IO_STATE (R_GEN_CONFIG, ata, disable) \
432 | IO_STATE (R_GEN_CONFIG, par0, disable) \
433 | IO_STATE (R_GEN_CONFIG, mio, disable) \
434 | IO_STATE (R_GEN_CONFIG, scsi1, disable) \
435 | IO_STATE (R_GEN_CONFIG, scsi0w, disable) \
436 | IO_STATE (R_GEN_CONFIG, par1, disable) \
437 | IO_STATE (R_GEN_CONFIG, ser3, disable) \
438 | IO_STATE (R_GEN_CONFIG, mio_w, disable) \
439 | IO_STATE (R_GEN_CONFIG, usb1, disable) \
440 | IO_STATE (R_GEN_CONFIG, usb2, disable) \
441 | IO_STATE (R_GEN_CONFIG, par_w, disable),$r0
444 or.d IO_STATE (R_GEN_CONFIG, dma2, ata) \
445 | IO_STATE (R_GEN_CONFIG, dma3, ata) \
446 | IO_STATE (R_GEN_CONFIG, dma4, scsi1) \
447 | IO_STATE (R_GEN_CONFIG, dma5, scsi1) \
448 | IO_STATE (R_GEN_CONFIG, dma6, unused) \
449 | IO_STATE (R_GEN_CONFIG, dma7, unused) \
450 | IO_STATE (R_GEN_CONFIG, dma8, usb) \
451 | IO_STATE (R_GEN_CONFIG, dma9, usb),$r0
455 or.d IO_STATE (R_GEN_CONFIG, g0dir, out),$r0
459 or.d IO_STATE (R_GEN_CONFIG, g8_15dir, out),$r0
462 or.d IO_STATE (R_GEN_CONFIG, g16_23dir, out),$r0
466 or.d IO_STATE (R_GEN_CONFIG, g24dir, out),$r0
490 moveq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
495 cmpq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
500 cmpq IO_STATE (R_DMA_CH9_CMD, cmd, reset),$r0
509 or.b IO_STATE (R_PORT_PA_DIR, dir7, output),$r0
529 or.b IO_STATE (R_PORT_PB_DIR, dir5, output),$r0
568 moveq IO_STATE (R_SERIAL0_XOFF, tx_stop, enable) \
569 | IO_STATE (R_SERIAL0_XOFF, auto_xoff, disable) \
574 move.b IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz) \
575 | IO_STATE (R_SERIAL0_BAUD, rec_baud, c115k2Hz),$r0
579 move.b IO_STATE (R_SERIAL0_REC_CTRL, dma_err, stop) \
580 | IO_STATE (R_SERIAL0_REC_CTRL, rec_enable, enable) \
581 | IO_STATE (R_SERIAL0_REC_CTRL, rts_, active) \
582 | IO_STATE (R_SERIAL0_REC_CTRL, sampling, middle) \
583 | IO_STATE (R_SERIAL0_REC_CTRL, rec_stick_par, normal) \
584 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par, even) \
585 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par_en, disable) \
586 | IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0
591 | IO_STATE (R_SERIAL0_TR_CTRL, tr_enable, enable) \
592 | IO_STATE (R_SERIAL0_TR_CTRL, auto_cts, disabled) \
593 | IO_STATE (R_SERIAL0_TR_CTRL, stop_bits, one_bit) \
594 | IO_STATE (R_SERIAL0_TR_CTRL, tr_stick_par, normal) \
595 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par, even) \
596 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par_en, disable) \
597 | IO_STATE (R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit),$r0
602 moveq IO_STATE (R_SERIAL1_XOFF, tx_stop, enable) \
603 | IO_STATE (R_SERIAL1_XOFF, auto_xoff, disable) \
608 move.b IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz) \
609 | IO_STATE (R_SERIAL1_BAUD, rec_baud, c115k2Hz),$r0
613 move.b IO_STATE (R_SERIAL1_REC_CTRL, dma_err, stop) \
614 | IO_STATE (R_SERIAL1_REC_CTRL, rec_enable, enable) \
615 | IO_STATE (R_SERIAL1_REC_CTRL, rts_, active) \
616 | IO_STATE (R_SERIAL1_REC_CTRL, sampling, middle) \
617 | IO_STATE (R_SERIAL1_REC_CTRL, rec_stick_par, normal) \
618 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par, even) \
619 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par_en, disable) \
620 | IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0
625 | IO_STATE (R_SERIAL1_TR_CTRL, tr_enable, enable) \
626 | IO_STATE (R_SERIAL1_TR_CTRL, auto_cts, disabled) \
627 | IO_STATE (R_SERIAL1_TR_CTRL, stop_bits, one_bit) \
628 | IO_STATE (R_SERIAL1_TR_CTRL, tr_stick_par, normal) \
629 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par, even) \
630 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par_en, disable) \
631 | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0
637 moveq IO_STATE (R_SERIAL2_XOFF, tx_stop, enable) \
638 | IO_STATE (R_SERIAL2_XOFF, auto_xoff, disable) \
643 move.b IO_STATE (R_SERIAL2_BAUD, tr_baud, c115k2Hz) \
644 | IO_STATE (R_SERIAL2_BAUD, rec_baud, c115k2Hz),$r0
648 move.b IO_STATE (R_SERIAL2_REC_CTRL, dma_err, stop) \
649 | IO_STATE (R_SERIAL2_REC_CTRL, rec_enable, enable) \
650 | IO_STATE (R_SERIAL2_REC_CTRL, rts_, active) \
651 | IO_STATE (R_SERIAL2_REC_CTRL, sampling, middle) \
652 | IO_STATE (R_SERIAL2_REC_CTRL, rec_stick_par, normal) \
653 | IO_STATE (R_SERIAL2_REC_CTRL, rec_par, even) \
654 | IO_STATE (R_SERIAL2_REC_CTRL, rec_par_en, disable) \
655 | IO_STATE (R_SERIAL2_REC_CTRL, rec_bitnr, rec_8bit),$r0
660 | IO_STATE (R_SERIAL2_TR_CTRL, tr_enable, enable) \
661 | IO_STATE (R_SERIAL2_TR_CTRL, auto_cts, disabled) \
662 | IO_STATE (R_SERIAL2_TR_CTRL, stop_bits, one_bit) \
663 | IO_STATE (R_SERIAL2_TR_CTRL, tr_stick_par, normal) \
664 | IO_STATE (R_SERIAL2_TR_CTRL, tr_par, even) \
665 | IO_STATE (R_SERIAL2_TR_CTRL, tr_par_en, disable) \
666 | IO_STATE (R_SERIAL2_TR_CTRL, tr_bitnr, tr_8bit),$r0
673 moveq IO_STATE (R_SERIAL3_XOFF, tx_stop, enable) \
674 | IO_STATE (R_SERIAL3_XOFF, auto_xoff, disable) \
679 move.b IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz) \
680 | IO_STATE (R_SERIAL3_BAUD, rec_baud, c115k2Hz),$r0
684 move.b IO_STATE (R_SERIAL3_REC_CTRL, dma_err, stop) \
685 | IO_STATE (R_SERIAL3_REC_CTRL, rec_enable, enable) \
686 | IO_STATE (R_SERIAL3_REC_CTRL, rts_, active) \
687 | IO_STATE (R_SERIAL3_REC_CTRL, sampling, middle) \
688 | IO_STATE (R_SERIAL3_REC_CTRL, rec_stick_par, normal) \
689 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par, even) \
690 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par_en, disable) \
691 | IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0
696 | IO_STATE (R_SERIAL3_TR_CTRL, tr_enable, enable) \
697 | IO_STATE (R_SERIAL3_TR_CTRL, auto_cts, disabled) \
698 | IO_STATE (R_SERIAL3_TR_CTRL, stop_bits, one_bit) \
699 | IO_STATE (R_SERIAL3_TR_CTRL, tr_stick_par, normal) \
700 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par, even) \
701 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par_en, disable) \
702 | IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0