Lines Matching refs:at91_set_A_periph
178 at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */ in at91_add_device_eth()
179 at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */ in at91_add_device_eth()
180 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */ in at91_add_device_eth()
181 at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */ in at91_add_device_eth()
182 at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */ in at91_add_device_eth()
183 at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */ in at91_add_device_eth()
184 at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */ in at91_add_device_eth()
185 at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */ in at91_add_device_eth()
186 at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */ in at91_add_device_eth()
187 at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */ in at91_add_device_eth()
257 at91_set_A_periph(AT91_PIN_PA8, 0); in at91_add_device_mmc()
272 at91_set_A_periph(AT91_PIN_PA7, 1); in at91_add_device_mmc()
275 at91_set_A_periph(AT91_PIN_PA6, 1); in at91_add_device_mmc()
277 at91_set_A_periph(AT91_PIN_PA9, 1); in at91_add_device_mmc()
278 at91_set_A_periph(AT91_PIN_PA10, 1); in at91_add_device_mmc()
279 at91_set_A_periph(AT91_PIN_PA11, 1); in at91_add_device_mmc()
344 at91_set_A_periph(AT91_PIN_PA7, 1); in at91_add_device_mci()
346 at91_set_A_periph(AT91_PIN_PA6, 1); in at91_add_device_mci()
348 at91_set_A_periph(AT91_PIN_PA9, 1); in at91_add_device_mci()
349 at91_set_A_periph(AT91_PIN_PA10, 1); in at91_add_device_mci()
350 at91_set_A_periph(AT91_PIN_PA11, 1); in at91_add_device_mci()
376 at91_set_A_periph(AT91_PIN_PA8, 0); in at91_add_device_mci()
512 at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */ in at91_add_device_i2c()
515 at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */ in at91_add_device_i2c()
620 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ in at91_add_device_spi()
621 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ in at91_add_device_spi()
622 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */ in at91_add_device_spi()
627 at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */ in at91_add_device_spi()
628 at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */ in at91_add_device_spi()
629 at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */ in at91_add_device_spi()
844 at91_set_A_periph(AT91_PIN_PB17, 1); in configure_ssc_pins()
846 at91_set_A_periph(AT91_PIN_PB16, 1); in configure_ssc_pins()
848 at91_set_A_periph(AT91_PIN_PB18, 1); in configure_ssc_pins()
850 at91_set_A_periph(AT91_PIN_PB19, 1); in configure_ssc_pins()
852 at91_set_A_periph(AT91_PIN_PB20, 1); in configure_ssc_pins()
854 at91_set_A_periph(AT91_PIN_PB21, 1); in configure_ssc_pins()
926 at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */ in configure_dbgu_pins()
927 at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */ in configure_dbgu_pins()
964 at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */ in configure_usart0_pins()
965 at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */ in configure_usart0_pins()
968 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */ in configure_usart0_pins()
970 at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */ in configure_usart0_pins()
972 at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */ in configure_usart0_pins()
974 at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */ in configure_usart0_pins()
976 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */ in configure_usart0_pins()
978 at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */ in configure_usart0_pins()
1015 at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */ in configure_usart1_pins()
1016 at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */ in configure_usart1_pins()
1019 at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */ in configure_usart1_pins()
1021 at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */ in configure_usart1_pins()
1058 at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */ in configure_usart2_pins()
1059 at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */ in configure_usart2_pins()
1062 at91_set_A_periph(AT91_PIN_PA4, 0); /* RTS2 */ in configure_usart2_pins()
1064 at91_set_A_periph(AT91_PIN_PA5, 0); /* CTS2 */ in configure_usart2_pins()
1101 at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */ in configure_usart3_pins()
1102 at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */ in configure_usart3_pins()
1182 at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */ in configure_usart5_pins()
1183 at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */ in configure_usart5_pins()
1316 at91_set_A_periph(AT91_PIN_PC8, 0); in at91_add_device_cf()
1323 at91_set_A_periph(AT91_PIN_PC9, 0); in at91_add_device_cf()
1353 at91_set_A_periph(AT91_PIN_PC10, 0); /* CFRNW */ in at91_add_device_cf()
1354 at91_set_A_periph(AT91_PIN_PC15, 1); /* NWAIT */ in at91_add_device_cf()