Lines Matching refs:sbus_writeb
352 sbus_writeb(AMR_INIT, amd->regs + AMD7930_CR); in amd7930_idle()
353 sbus_writeb(0, amd->regs + AMD7930_DR); in amd7930_idle()
363 sbus_writeb(AMR_INIT, amd->regs + AMD7930_CR); in amd7930_enable_ints()
364 sbus_writeb(AM_INIT_ACTIVE, amd->regs + AMD7930_DR); in amd7930_enable_ints()
374 sbus_writeb(AMR_INIT, amd->regs + AMD7930_CR); in amd7930_disable_ints()
375 sbus_writeb(AM_INIT_ACTIVE | AM_INIT_DISABLE_INTS, amd->regs + AMD7930_DR); in amd7930_disable_ints()
386 sbus_writeb(AMR_MAP_GX, amd->regs + AMD7930_CR); in __amd7930_write_map()
387 sbus_writeb(((map->gx >> 0) & 0xff), amd->regs + AMD7930_DR); in __amd7930_write_map()
388 sbus_writeb(((map->gx >> 8) & 0xff), amd->regs + AMD7930_DR); in __amd7930_write_map()
390 sbus_writeb(AMR_MAP_GR, amd->regs + AMD7930_CR); in __amd7930_write_map()
391 sbus_writeb(((map->gr >> 0) & 0xff), amd->regs + AMD7930_DR); in __amd7930_write_map()
392 sbus_writeb(((map->gr >> 8) & 0xff), amd->regs + AMD7930_DR); in __amd7930_write_map()
394 sbus_writeb(AMR_MAP_STGR, amd->regs + AMD7930_CR); in __amd7930_write_map()
395 sbus_writeb(((map->stgr >> 0) & 0xff), amd->regs + AMD7930_DR); in __amd7930_write_map()
396 sbus_writeb(((map->stgr >> 8) & 0xff), amd->regs + AMD7930_DR); in __amd7930_write_map()
398 sbus_writeb(AMR_MAP_GER, amd->regs + AMD7930_CR); in __amd7930_write_map()
399 sbus_writeb(((map->ger >> 0) & 0xff), amd->regs + AMD7930_DR); in __amd7930_write_map()
400 sbus_writeb(((map->ger >> 8) & 0xff), amd->regs + AMD7930_DR); in __amd7930_write_map()
402 sbus_writeb(AMR_MAP_MMR1, amd->regs + AMD7930_CR); in __amd7930_write_map()
403 sbus_writeb(map->mmr1, amd->regs + AMD7930_DR); in __amd7930_write_map()
405 sbus_writeb(AMR_MAP_MMR2, amd->regs + AMD7930_CR); in __amd7930_write_map()
406 sbus_writeb(map->mmr2, amd->regs + AMD7930_DR); in __amd7930_write_map()
512 sbus_writeb(byte, amd->regs + AMD7930_BBTB); in snd_amd7930_interrupt()
516 sbus_writeb(0, amd->regs + AMD7930_BBTB); in snd_amd7930_interrupt()
548 sbus_writeb(AMR_MUX_MCR4, amd->regs + AMD7930_CR); in snd_amd7930_trigger()
549 sbus_writeb(AM_MUX_MCR4_ENABLE_INTS, amd->regs + AMD7930_DR); in snd_amd7930_trigger()
556 sbus_writeb(AMR_MUX_MCR4, amd->regs + AMD7930_CR); in snd_amd7930_trigger()
557 sbus_writeb(0, amd->regs + AMD7930_DR); in snd_amd7930_trigger()
989 sbus_writeb(AMR_MUX_MCR1, amd->regs + AMD7930_CR); in snd_amd7930_create()
990 sbus_writeb(AM_MUX_CHANNEL_Ba | (AM_MUX_CHANNEL_Bb << 4), in snd_amd7930_create()