Lines Matching refs:iga1_crtc_reg
348 static struct iga1_crtc_timing iga1_crtc_reg = { variable
1783 iga1_crtc_reg.hor_total.reg_num; in viafb_load_crtc_timing()
1784 reg = iga1_crtc_reg.hor_total.reg; in viafb_load_crtc_timing()
1791 iga1_crtc_reg.hor_addr.reg_num; in viafb_load_crtc_timing()
1792 reg = iga1_crtc_reg.hor_addr.reg; in viafb_load_crtc_timing()
1799 iga1_crtc_reg.hor_blank_start.reg_num; in viafb_load_crtc_timing()
1800 reg = iga1_crtc_reg.hor_blank_start.reg; in viafb_load_crtc_timing()
1808 iga1_crtc_reg.hor_blank_end.reg_num; in viafb_load_crtc_timing()
1809 reg = iga1_crtc_reg.hor_blank_end.reg; in viafb_load_crtc_timing()
1816 iga1_crtc_reg.hor_sync_start.reg_num; in viafb_load_crtc_timing()
1817 reg = iga1_crtc_reg.hor_sync_start.reg; in viafb_load_crtc_timing()
1825 iga1_crtc_reg.hor_sync_end.reg_num; in viafb_load_crtc_timing()
1826 reg = iga1_crtc_reg.hor_sync_end.reg; in viafb_load_crtc_timing()
1833 iga1_crtc_reg.ver_total.reg_num; in viafb_load_crtc_timing()
1834 reg = iga1_crtc_reg.ver_total.reg; in viafb_load_crtc_timing()
1841 iga1_crtc_reg.ver_addr.reg_num; in viafb_load_crtc_timing()
1842 reg = iga1_crtc_reg.ver_addr.reg; in viafb_load_crtc_timing()
1849 iga1_crtc_reg.ver_blank_start.reg_num; in viafb_load_crtc_timing()
1850 reg = iga1_crtc_reg.ver_blank_start.reg; in viafb_load_crtc_timing()
1858 iga1_crtc_reg.ver_blank_end.reg_num; in viafb_load_crtc_timing()
1859 reg = iga1_crtc_reg.ver_blank_end.reg; in viafb_load_crtc_timing()
1866 iga1_crtc_reg.ver_sync_start.reg_num; in viafb_load_crtc_timing()
1867 reg = iga1_crtc_reg.ver_sync_start.reg; in viafb_load_crtc_timing()
1875 iga1_crtc_reg.ver_sync_end.reg_num; in viafb_load_crtc_timing()
1876 reg = iga1_crtc_reg.ver_sync_end.reg; in viafb_load_crtc_timing()