Lines Matching refs:DSS_CONTROL
49 #define DSS_CONTROL DSS_REG(0x0040) macro
290 DUMPREG(DSS_CONTROL); in dss_dump_regs()
322 REG_FLD_MOD(DSS_CONTROL, b, start, end); /* DISPC_CLK_SWITCH */ in dss_select_dispc_clk_source()
343 REG_FLD_MOD(DSS_CONTROL, b, 1, 1); /* DSI_CLK_SWITCH */ in dss_select_dsi_clk_source()
370 REG_FLD_MOD(DSS_CONTROL, b, pos, pos); /* LCDx_CLK_SWITCH */ in dss_select_lcd_clk_source()
624 REG_FLD_MOD(DSS_CONTROL, l, 6, 6); in dss_set_venc_output()
629 REG_FLD_MOD(DSS_CONTROL, enable, 5, 5); /* DAC Power-Down Control */ in dss_set_dac_pwrdn_bgz()
634 REG_FLD_MOD(DSS_CONTROL, hdmi, 15, 15); /* VENC_HDMI_SWITCH */ in dss_select_hdmi_venc_clk_source()
676 REG_FLD_MOD(DSS_CONTROL, 0, 0, 0); in dss_init()
679 REG_FLD_MOD(DSS_CONTROL, 1, 4, 4); /* venc dac demen */ in dss_init()
680 REG_FLD_MOD(DSS_CONTROL, 1, 3, 3); /* venc clock 4x enable */ in dss_init()
681 REG_FLD_MOD(DSS_CONTROL, 0, 2, 2); /* venc clock mode = normal */ in dss_init()