336 		r = NCR5380_read(reg);  in NCR5380_poll_politely()
345 		r = NCR5380_read(reg);  in NCR5380_poll_politely()
424 	data = NCR5380_read(CURRENT_SCSI_DATA_REG);  in NCR5380_print()
425 	status = NCR5380_read(STATUS_REG);  in NCR5380_print()
426 	mr = NCR5380_read(MODE_REG);  in NCR5380_print()
427 	icr = NCR5380_read(INITIATOR_COMMAND_REG);  in NCR5380_print()
428 	basr = NCR5380_read(BUS_AND_STATUS_REG);  in NCR5380_print()
466 	status = NCR5380_read(STATUS_REG);  in NCR5380_print_phase()
905 	for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {  in NCR5380_init()
1177 		basr = NCR5380_read(BUS_AND_STATUS_REG);  in NCR5380_intr()
1181 			if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {  in NCR5380_intr()
1185 				(void) NCR5380_read(RESET_PARITY_INTERRUPT_REG);  in NCR5380_intr()
1188 				(void) NCR5380_read(RESET_PARITY_INTERRUPT_REG);  in NCR5380_intr()
1189 			} else if ((NCR5380_read(STATUS_REG) & SR_RST) == SR_RST) {  in NCR5380_intr()
1191 				(void) NCR5380_read(RESET_PARITY_INTERRUPT_REG);  in NCR5380_intr()
1200 …if ((NCR5380_read(MODE_REG) & MR_DMA) && ((basr & BASR_END_DMA_TRANSFER) || !(basr & BASR_PHASE_MA…  in NCR5380_intr()
1211 					(void) NCR5380_read(RESET_PARITY_INTERRUPT_REG);  in NCR5380_intr()
1220 … unknown interrupt, BASR 0x%X, MR 0x%X, SR 0x%x\n", basr, NCR5380_read(MODE_REG), NCR5380_read(STA…  in NCR5380_intr()
1221 				(void) NCR5380_read(RESET_PARITY_INTERRUPT_REG);  in NCR5380_intr()
1355 …f ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) || (NCR5380_read(CURRENT_SCSI_DATA…  in NCR5380_select()
1367 	    (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {  in NCR5380_select()
1454 	value = NCR5380_read(STATUS_REG) & (SR_BSY | SR_IO);  in NCR5380_select()
1466 	if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {  in NCR5380_select()
1483 	if (!(NCR5380_read(STATUS_REG) & SR_BSY)) {  in NCR5380_select()
1623 		while (!((tmp = NCR5380_read(STATUS_REG)) & SR_REQ) && !break_allowed);  in NCR5380_transfer_pio()
1642 			*d = NCR5380_read(CURRENT_SCSI_DATA_REG);  in NCR5380_transfer_pio()
1695 	tmp = NCR5380_read(STATUS_REG);  in NCR5380_transfer_pio()
1721 	NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));  in do_reset()
1828 	if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {  in NCR5380_transfer_dma()
1867 	dprintk(NDEBUG_DMA, ("scsi%d : mode reg = 0x%X\n", instance->host_no, NCR5380_read(MODE_REG)));  in NCR5380_transfer_dma()
1887 		tmp = NCR5380_read(BUS_AND_STATUS_REG);  in NCR5380_transfer_dma()
1929 …if (((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) == (BASR_PHASE_MATCH | BAS…  in NCR5380_transfer_dma()
1930 			saved_data = NCR5380_read(INPUT_DATA_REGISTER);  in NCR5380_transfer_dma()
1936 …while (((tmp = NCR5380_read(BUS_AND_STATUS_REG)) & BASR_ACK) || (NCR5380_read(STATUS_REG) & SR_REQ…  in NCR5380_transfer_dma()
1944 …d DMA transfer complete, basr 0x%X, sr 0x%X\n", instance->host_no, tmp, NCR5380_read(STATUS_REG)));  in NCR5380_transfer_dma()
1953 	*phase = NCR5380_read(STATUS_REG) & PHASE_MASK;  in NCR5380_transfer_dma()
2011 				while (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_DRQ));  in NCR5380_transfer_dma()
2013 				while (NCR5380_read(STATUS_REG) & SR_REQ);  in NCR5380_transfer_dma()
2014 				d[c - 1] = NCR5380_read(INPUT_DATA_REG);  in NCR5380_transfer_dma()
2031 …while (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_DRQ) && (NCR5380_read(BUS_AND_STATUS_REG) & BASR_…  in NCR5380_transfer_dma()
2038 					if (NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT) {  in NCR5380_transfer_dma()
2045 				while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT));  in NCR5380_transfer_dma()
2056 		if (NCR5380_read(BUS_AND_STATUS_REG) & BASR_IRQ) {  in NCR5380_transfer_dma()
2058 			NCR5380_read(RESET_PARITY_INTERRUPT_REG);  in NCR5380_transfer_dma()
2065 	*phase = NCR5380_read(STATUS_REG) & PHASE_MASK;  in NCR5380_transfer_dma()
2111 		tmp = NCR5380_read(STATUS_REG);
2123 				while (NCR5380_read(STATUS_REG) & SR_REQ);
2312 					while ((NCR5380_read(STATUS_REG) & SR_BSY) && !hostdata->connected)
2348 						while ((NCR5380_read(STATUS_REG) & SR_BSY) && !hostdata->connected)
2526 	target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
2693 …rintk(NDEBUG_ABORT, ("        basr 0x%X, sr 0x%X\n", NCR5380_read(BUS_AND_STATUS_REG), NCR5380_rea…