Lines Matching refs:QLCNIC_CAM_RAM
556 #define QLCNIC_CAM_RAM(reg) (QLCNIC_CAM_RAM_BASE + (reg)) macro
557 #define QLCNIC_FW_VERSION_MAJOR (QLCNIC_CAM_RAM(0x150))
558 #define QLCNIC_FW_VERSION_MINOR (QLCNIC_CAM_RAM(0x154))
559 #define QLCNIC_FW_VERSION_SUB (QLCNIC_CAM_RAM(0x158))
560 #define QLCNIC_ROM_LOCK_ID (QLCNIC_CAM_RAM(0x100))
561 #define QLCNIC_PHY_LOCK_ID (QLCNIC_CAM_RAM(0x120))
562 #define QLCNIC_CRB_WIN_LOCK_ID (QLCNIC_CAM_RAM(0x124))
564 #define NIC_CRB_BASE (QLCNIC_CAM_RAM(0x200))
565 #define NIC_CRB_BASE_2 (QLCNIC_CAM_RAM(0x700))
588 #define CRB_FW_CAPABILITIES_1 (QLCNIC_CAM_RAM(0x128))
589 #define CRB_MAC_BLOCK_START (QLCNIC_CAM_RAM(0x1c0))
671 #define QLCNIC_PORT_MODE_ADDR (QLCNIC_CAM_RAM(0x24))
672 #define QLCNIC_WOL_PORT_MODE (QLCNIC_CAM_RAM(0x198))
674 #define QLCNIC_WOL_CONFIG_NV (QLCNIC_CAM_RAM(0x184))
675 #define QLCNIC_WOL_CONFIG (QLCNIC_CAM_RAM(0x188))
678 #define QLCNIC_PEG_TUNE_CAPABILITY (QLCNIC_CAM_RAM(0x02c))
680 #define QLCNIC_DMA_WATCHDOG_CTRL (QLCNIC_CAM_RAM(0x14))
681 #define QLCNIC_PEG_ALIVE_COUNTER (QLCNIC_CAM_RAM(0xb0))
682 #define QLCNIC_PEG_HALT_STATUS1 (QLCNIC_CAM_RAM(0xa8))
683 #define QLCNIC_PEG_HALT_STATUS2 (QLCNIC_CAM_RAM(0xac))
684 #define QLCNIC_CRB_DRV_ACTIVE (QLCNIC_CAM_RAM(0x138))
685 #define QLCNIC_CRB_DEV_STATE (QLCNIC_CAM_RAM(0x140))
687 #define QLCNIC_CRB_DRV_STATE (QLCNIC_CAM_RAM(0x144))
688 #define QLCNIC_CRB_DRV_SCRATCH (QLCNIC_CAM_RAM(0x148))
689 #define QLCNIC_CRB_DEV_PARTITION_INFO (QLCNIC_CAM_RAM(0x14c))
690 #define QLCNIC_CRB_DRV_IDC_VER (QLCNIC_CAM_RAM(0x174))
691 #define QLCNIC_CRB_DEV_NPAR_STATE (QLCNIC_CAM_RAM(0x19c))