167 	REG_WR(bp,  addr + 4, U64_HI(mapping));  in __storm_memset_dma_mapping()
565 	dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, wb_comp));  in bnx2x_prep_dmae_with_comp()
636 	dmae.src_addr_hi = U64_HI(dma_addr);  in bnx2x_write_dmae()
669 	dmae.dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, wb_data));  in bnx2x_read_dmae()
2605 	eq_data.base_addr.hi = U64_HI(bp->eq_mapping);  in bnx2x_pf_init()
2796 	   bp->spq_prod_idx, (u32)U64_HI(bp->spq_mapping),  in bnx2x_sp_post()
4083 		sb_data_e2.common.host_sb_addr.hi = U64_HI(mapping);  in bnx2x_init_sb()
4097 		sb_data_e1x.common.host_sb_addr.hi = U64_HI(mapping);  in bnx2x_init_sb()
4192 		REG_WR(bp, reg_offset + 4, U64_HI(section));  in bnx2x_init_def_sb()
4195 		REG_WR(bp, IGU_REG_ATTN_MSG_ADDR_H, U64_HI(section));  in bnx2x_init_def_sb()
4204 	sp_sb_data.host_sb_addr.hi	= U64_HI(section);  in bnx2x_init_def_sb()
4247 			cpu_to_le32(U64_HI(bp->eq_mapping +  in bnx2x_init_eq_ring()
6260 		      U64_HI(bnx2x_sp_mapping(bp, mac_config)),  in bnx2x_set_mac_addr_gen()
6490 		   U64_HI(config_cmd_map), U64_LO(config_cmd_map), 1);  in bnx2x_set_e1_mc_list()
6519 		      U64_HI(config_cmd_map), U64_LO(config_cmd_map), 1);  in bnx2x_invalidate_e1_mc_list()
6686 		cpu_to_le32(U64_HI(params->rxq_params.dscr_map));  in bnx2x_fill_cl_init_data()
6690 		cpu_to_le32(U64_HI(params->rxq_params.sge_map));  in bnx2x_fill_cl_init_data()
6694 		cpu_to_le32(U64_HI(params->rxq_params.rcq_map));  in bnx2x_fill_cl_init_data()
6707 		cpu_to_le32(U64_HI(params->txq_params.dscr_map));  in bnx2x_fill_cl_init_data()
6795 		      U64_HI(data_mapping), U64_LO(data_mapping), 0);  in bnx2x_setup_fw_client()
9146 		   U64_HI(config_cmd_map), U64_LO(config_cmd_map), 1);  in bnx2x_set_uc_list()
9179 		      U64_HI(config_cmd_map), U64_LO(config_cmd_map), 1);  in bnx2x_invalidate_uc_list()