219 		enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan));  in bcm_enet_refill_rx()
356 				ENETDMA_CHANCFG_REG(priv->rx_chan));  in bcm_enet_receive_queue()
432 			ENETDMA_IR_REG(priv->rx_chan));  in bcm_enet_poll()
454 			ENETDMA_IRMASK_REG(priv->rx_chan));  in bcm_enet_poll()
499 	enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));  in bcm_enet_isr_dma()
691 		val |= ENETDMA_CFG_FLOWCH_MASK(priv->rx_chan);  in bcm_enet_set_flow()
693 		val &= ~ENETDMA_CFG_FLOWCH_MASK(priv->rx_chan);  in bcm_enet_set_flow()
835 	enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));  in bcm_enet_open()
916 			ENETDMA_BUFALLOC_REG(priv->rx_chan));  in bcm_enet_open()
926 			ENETDMA_RSTART_REG(priv->rx_chan));  in bcm_enet_open()
931 	enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->rx_chan));  in bcm_enet_open()
933 	enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->rx_chan));  in bcm_enet_open()
935 	enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->rx_chan));  in bcm_enet_open()
944 			ENETDMA_MAXBURST_REG(priv->rx_chan));  in bcm_enet_open()
953 	enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan));  in bcm_enet_open()
955 	enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan));  in bcm_enet_open()
965 			ENETDMA_CHANCFG_REG(priv->rx_chan));  in bcm_enet_open()
973 			ENETDMA_IR_REG(priv->rx_chan));  in bcm_enet_open()
981 			ENETDMA_IRMASK_REG(priv->rx_chan));  in bcm_enet_open()
1096 	enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));  in bcm_enet_stop()
1104 	bcm_enet_disable_dma(priv, priv->rx_chan);  in bcm_enet_stop()
1666 		priv->rx_chan = 0;  in bcm_enet_probe()
1670 		priv->rx_chan = 2;  in bcm_enet_probe()