Lines Matching refs:atl1_write_phy_reg
602 static s32 atl1_write_phy_reg(struct atl1_hw *hw, u32 reg_addr, u16 phy_data) in atl1_write_phy_reg() function
636 ret = atl1_write_phy_reg(hw, 29, 0x0029); in atl1_phy_leave_power_saving()
639 return atl1_write_phy_reg(hw, 30, 0); in atl1_phy_leave_power_saving()
679 ret_val = atl1_write_phy_reg(hw, MII_BMCR, phy_data); in atl1_phy_reset()
768 ret_val = atl1_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg); in atl1_phy_setup_autoneg_adv()
772 ret_val = atl1_write_phy_reg(hw, MII_ATLX_CR, mii_1000t_ctrl_reg); in atl1_phy_setup_autoneg_adv()
861 ret_val = atl1_write_phy_reg(hw, 18, 0xC00); in atl1_init_hw()
1010 atl1_write_phy_reg(&adapter->hw, reg_num, val); in mdio_write()
1401 atl1_write_phy_reg(hw, MII_BMCR, phy_data); in atl1_check_link()
2545 atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg); in atl1_phy_config()
2546 atl1_write_phy_reg(hw, MII_ATLX_CR, hw->mii_1000t_ctrl_reg); in atl1_phy_config()
2547 atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN); in atl1_phy_config()
3339 atl1_write_phy_reg(hw, MII_BMCR, phy_data); in atl1_set_settings()
3651 atl1_write_phy_reg(hw, MII_BMCR, phy_data); in atl1_nway_reset()