55 	writel(PPC4XX_BYTE_ORDER, dev->ce_base + CRYPTO4XX_BYTE_ORDER_CFG);  in crypto4xx_hw_init()
66 	writel(pe_dma_cfg.w, dev->ce_base + CRYPTO4XX_PE_DMA_CFG);  in crypto4xx_hw_init()
73 	writel(pe_dma_cfg.w, dev->ce_base + CRYPTO4XX_PE_DMA_CFG);  in crypto4xx_hw_init()
74 	writel(dev->pdr_pa, dev->ce_base + CRYPTO4XX_PDR_BASE);  in crypto4xx_hw_init()
75 	writel(dev->pdr_pa, dev->ce_base + CRYPTO4XX_RDR_BASE);  in crypto4xx_hw_init()
76 	writel(PPC4XX_PRNG_CTRL_AUTO_EN, dev->ce_base + CRYPTO4XX_PRNG_CTRL);  in crypto4xx_hw_init()
78 	writel(rand_num, dev->ce_base + CRYPTO4XX_PRNG_SEED_L);  in crypto4xx_hw_init()
80 	writel(rand_num, dev->ce_base + CRYPTO4XX_PRNG_SEED_H);  in crypto4xx_hw_init()
84 	writel(ring_size.w, dev->ce_base + CRYPTO4XX_RING_SIZE);  in crypto4xx_hw_init()
86 	writel(ring_ctrl.w, dev->ce_base + CRYPTO4XX_RING_CTRL);  in crypto4xx_hw_init()
87 	writel(PPC4XX_DC_3DES_EN, dev->ce_base + CRYPTO4XX_DEVICE_CTRL);  in crypto4xx_hw_init()
88 	writel(dev->gdr_pa, dev->ce_base + CRYPTO4XX_GATH_RING_BASE);  in crypto4xx_hw_init()
89 	writel(dev->sdr_pa, dev->ce_base + CRYPTO4XX_SCAT_RING_BASE);  in crypto4xx_hw_init()
93 	writel(part_ring_size.w, dev->ce_base + CRYPTO4XX_PART_RING_SIZE);  in crypto4xx_hw_init()
94 	writel(PPC4XX_SD_BUFFER_SIZE, dev->ce_base + CRYPTO4XX_PART_RING_CFG);  in crypto4xx_hw_init()
98 	writel(io_threshold.w, dev->ce_base + CRYPTO4XX_IO_THRESHOLD);  in crypto4xx_hw_init()
99 	writel(0, dev->ce_base + CRYPTO4XX_PDR_BASE_UADDR);  in crypto4xx_hw_init()
100 	writel(0, dev->ce_base + CRYPTO4XX_RDR_BASE_UADDR);  in crypto4xx_hw_init()
101 	writel(0, dev->ce_base + CRYPTO4XX_PKT_SRC_UADDR);  in crypto4xx_hw_init()
102 	writel(0, dev->ce_base + CRYPTO4XX_PKT_DEST_UADDR);  in crypto4xx_hw_init()
103 	writel(0, dev->ce_base + CRYPTO4XX_SA_UADDR);  in crypto4xx_hw_init()
104 	writel(0, dev->ce_base + CRYPTO4XX_GATH_RING_BASE_UADDR);  in crypto4xx_hw_init()
105 	writel(0, dev->ce_base + CRYPTO4XX_SCAT_RING_BASE_UADDR);  in crypto4xx_hw_init()
112 	writel(pe_dma_cfg.w, dev->ce_base + CRYPTO4XX_PE_DMA_CFG);  in crypto4xx_hw_init()
114 	writel(PPC4XX_INTERRUPT_CLR, dev->ce_base + CRYPTO4XX_INT_CLR);  in crypto4xx_hw_init()
115 	writel(PPC4XX_INT_DESCR_CNT, dev->ce_base + CRYPTO4XX_INT_DESCR_CNT);  in crypto4xx_hw_init()
116 	writel(PPC4XX_INT_DESCR_CNT, dev->ce_base + CRYPTO4XX_INT_DESCR_CNT);  in crypto4xx_hw_init()
117 	writel(PPC4XX_INT_CFG, dev->ce_base + CRYPTO4XX_INT_CFG);  in crypto4xx_hw_init()
118 	writel(PPC4XX_PD_DONE_INT, dev->ce_base + CRYPTO4XX_INT_EN);  in crypto4xx_hw_init()
722 	iounmap(core_dev->dev->ce_base);  in crypto4xx_stop_all()
980 	writel(1, dev->ce_base + CRYPTO4XX_INT_DESCR_RD);  in crypto4xx_build_pd()
1111 	if (core_dev->dev->ce_base == 0)  in crypto4xx_ce_interrupt_handler()
1115 	       core_dev->dev->ce_base + CRYPTO4XX_INT_CLR);  in crypto4xx_ce_interrupt_handler()
1223 	core_dev->dev->ce_base = of_iomap(ofdev->dev.of_node, 0);  in crypto4xx_probe()
1224 	if (!core_dev->dev->ce_base) {  in crypto4xx_probe()
1241 	iounmap(core_dev->dev->ce_base);  in crypto4xx_probe()