75 #define DMA_CHNL(dmac, n)	((dmac) + 0x1000 + (n) * 0x100)  macro
147 	return (readl(DMA_CHNL(dmac, chan) + S6_DMA_CHNCTRL)  in s6dmac_fifo_full()
179 	return (readl(DMA_CHNL(dmac, chan) + S6_DMA_CHNCTRL)  in s6dmac_pending_count()
187 	n |= readl(DMA_CHNL(dmac, chan) + S6_DMA_TERMCNTNB)  in s6dmac_set_terminal_count()
189 	writel(n, DMA_CHNL(dmac, chan) + S6_DMA_TERMCNTNB);  in s6dmac_set_terminal_count()
194 	return (readl(DMA_CHNL(dmac, chan) + S6_DMA_TERMCNTNB))  in s6dmac_get_terminal_count()
200 	return readl(DMA_CHNL(dmac, chan) + S6_DMA_TIMESTAMP);  in s6dmac_timestamp()
205 	return readl(DMA_CHNL(dmac, chan) + S6_DMA_CUR_SRC);  in s6dmac_cur_src()
210 	return readl(DMA_CHNL(dmac, chan) + S6_DMA_CUR_DST);  in s6dmac_cur_dst()
216 	writel(readl(DMA_CHNL(dmac, chan) + S6_DMA_CHNCTRL)  in s6dmac_disable_chan()
218 		DMA_CHNL(dmac, chan) + S6_DMA_CHNCTRL);  in s6dmac_disable_chan()
220 		ctrl = readl(DMA_CHNL(dmac, chan) + S6_DMA_CHNCTRL);  in s6dmac_disable_chan()
228 	writel(comchunk, DMA_CHNL(dmac, chan) + S6_DMA_CMONCHUNK);  in s6dmac_set_stride_skip()
229 	writel(srcskip, DMA_CHNL(dmac, chan) + S6_DMA_SRCSKIP);  in s6dmac_set_stride_skip()
230 	writel(dstskip, DMA_CHNL(dmac, chan) + S6_DMA_DSTSKIP);  in s6dmac_set_stride_skip()
245 	writel(1, DMA_CHNL(dmac, chan) + S6_DMA_TERMCNTNB);  in s6dmac_enable_chan()
246 	writel(0, DMA_CHNL(dmac, chan) + S6_DMA_TERMCNTTMO);  in s6dmac_enable_chan()
248 		DMA_CHNL(dmac, chan) + S6_DMA_CHNCTRL);  in s6dmac_enable_chan()
261 		DMA_CHNL(dmac, chan) + S6_DMA_CHNCTRL);  in s6dmac_enable_chan()
348 	return readl(DMA_CHNL(dmac, chan) + S6_DMA_CHNCTRL) &  in s6dmac_channel_enabled()