Lines Matching refs:SH_HWBLK_CLK
199 SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
200 SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
201 SH_HWBLK_CLK(HWBLK_OC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
202 SH_HWBLK_CLK(HWBLK_RSMEM, &div4_clks[DIV4_B], CLK_ENABLE_ON_INIT),
203 SH_HWBLK_CLK(HWBLK_ILMEM, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
204 SH_HWBLK_CLK(HWBLK_L2C, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
205 SH_HWBLK_CLK(HWBLK_FPU, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
206 SH_HWBLK_CLK(HWBLK_INTC, &div4_clks[DIV4_P], CLK_ENABLE_ON_INIT),
207 SH_HWBLK_CLK(HWBLK_DMAC0, &div4_clks[DIV4_B], 0),
208 SH_HWBLK_CLK(HWBLK_SHYWAY, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
209 SH_HWBLK_CLK(HWBLK_HUDI, &div4_clks[DIV4_P], 0),
210 SH_HWBLK_CLK(HWBLK_UBC, &div4_clks[DIV4_I], 0),
211 SH_HWBLK_CLK(HWBLK_TMU0, &div4_clks[DIV4_P], 0),
212 SH_HWBLK_CLK(HWBLK_CMT, &r_clk, 0),
213 SH_HWBLK_CLK(HWBLK_RWDT, &r_clk, 0),
214 SH_HWBLK_CLK(HWBLK_DMAC1, &div4_clks[DIV4_B], 0),
215 SH_HWBLK_CLK(HWBLK_TMU1, &div4_clks[DIV4_P], 0),
216 SH_HWBLK_CLK(HWBLK_SCIF0, &div4_clks[DIV4_P], 0),
217 SH_HWBLK_CLK(HWBLK_SCIF1, &div4_clks[DIV4_P], 0),
218 SH_HWBLK_CLK(HWBLK_SCIF2, &div4_clks[DIV4_P], 0),
219 SH_HWBLK_CLK(HWBLK_SCIF3, &div4_clks[DIV4_B], 0),
220 SH_HWBLK_CLK(HWBLK_SCIF4, &div4_clks[DIV4_B], 0),
221 SH_HWBLK_CLK(HWBLK_SCIF5, &div4_clks[DIV4_B], 0),
222 SH_HWBLK_CLK(HWBLK_MSIOF0, &div4_clks[DIV4_B], 0),
223 SH_HWBLK_CLK(HWBLK_MSIOF1, &div4_clks[DIV4_B], 0),
225 SH_HWBLK_CLK(HWBLK_KEYSC, &r_clk, 0),
226 SH_HWBLK_CLK(HWBLK_RTC, &r_clk, 0),
227 SH_HWBLK_CLK(HWBLK_IIC0, &div4_clks[DIV4_P], 0),
228 SH_HWBLK_CLK(HWBLK_IIC1, &div4_clks[DIV4_P], 0),
230 SH_HWBLK_CLK(HWBLK_MMC, &div4_clks[DIV4_B], 0),
231 SH_HWBLK_CLK(HWBLK_ETHER, &div4_clks[DIV4_B], 0),
232 SH_HWBLK_CLK(HWBLK_ATAPI, &div4_clks[DIV4_B], 0),
233 SH_HWBLK_CLK(HWBLK_TPU, &div4_clks[DIV4_B], 0),
234 SH_HWBLK_CLK(HWBLK_IRDA, &div4_clks[DIV4_P], 0),
235 SH_HWBLK_CLK(HWBLK_TSIF, &div4_clks[DIV4_B], 0),
236 SH_HWBLK_CLK(HWBLK_USB1, &div4_clks[DIV4_B], 0),
237 SH_HWBLK_CLK(HWBLK_USB0, &div4_clks[DIV4_B], 0),
238 SH_HWBLK_CLK(HWBLK_2DG, &div4_clks[DIV4_B], 0),
239 SH_HWBLK_CLK(HWBLK_SDHI0, &div4_clks[DIV4_B], 0),
240 SH_HWBLK_CLK(HWBLK_SDHI1, &div4_clks[DIV4_B], 0),
241 SH_HWBLK_CLK(HWBLK_VEU1, &div4_clks[DIV4_B], 0),
242 SH_HWBLK_CLK(HWBLK_CEU1, &div4_clks[DIV4_B], 0),
243 SH_HWBLK_CLK(HWBLK_BEU1, &div4_clks[DIV4_B], 0),
244 SH_HWBLK_CLK(HWBLK_2DDMAC, &div4_clks[DIV4_SH], 0),
245 SH_HWBLK_CLK(HWBLK_SPU, &div4_clks[DIV4_B], 0),
246 SH_HWBLK_CLK(HWBLK_JPU, &div4_clks[DIV4_B], 0),
247 SH_HWBLK_CLK(HWBLK_VOU, &div4_clks[DIV4_B], 0),
248 SH_HWBLK_CLK(HWBLK_BEU0, &div4_clks[DIV4_B], 0),
249 SH_HWBLK_CLK(HWBLK_CEU0, &div4_clks[DIV4_B], 0),
250 SH_HWBLK_CLK(HWBLK_VEU0, &div4_clks[DIV4_B], 0),
251 SH_HWBLK_CLK(HWBLK_VPU, &div4_clks[DIV4_B], 0),
252 SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_B], 0),