Lines Matching refs:CPM_PORTE
114 {CPM_PORTE, 21, CPM_PIN_INPUT}, /* RX */
115 {CPM_PORTE, 20, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
123 {CPM_PORTE, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TENA */
124 {CPM_PORTE, 17, CPM_PIN_INPUT}, /* CLK5 */
125 {CPM_PORTE, 16, CPM_PIN_INPUT}, /* CLK6 */
139 {CPM_PORTE, 30, CPM_PIN_OUTPUT},
140 {CPM_PORTE, 31, CPM_PIN_OUTPUT},
144 {CPM_PORTE, 14, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
145 {CPM_PORTE, 15, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
146 {CPM_PORTE, 16, CPM_PIN_OUTPUT},
147 {CPM_PORTE, 17, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
148 {CPM_PORTE, 18, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
149 {CPM_PORTE, 19, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
150 {CPM_PORTE, 20, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
151 {CPM_PORTE, 21, CPM_PIN_OUTPUT},
152 {CPM_PORTE, 22, CPM_PIN_OUTPUT},
153 {CPM_PORTE, 23, CPM_PIN_OUTPUT},
154 {CPM_PORTE, 24, CPM_PIN_OUTPUT},
155 {CPM_PORTE, 25, CPM_PIN_OUTPUT},
156 {CPM_PORTE, 26, CPM_PIN_OUTPUT},
157 {CPM_PORTE, 27, CPM_PIN_OUTPUT},
158 {CPM_PORTE, 28, CPM_PIN_OUTPUT},
159 {CPM_PORTE, 29, CPM_PIN_OUTPUT},