Lines Matching refs:__SYSREG
23 #define TMPSCNT __SYSREG(0xd4003071, u8) /* timer prescaler control */
30 #define TM0MD __SYSREG(0xd4003000, u8) /* timer 0 mode register */
44 #define TM1MD __SYSREG(0xd4003001, u8) /* timer 1 mode register */
58 #define TM2MD __SYSREG(0xd4003002, u8) /* timer 2 mode register */
72 #define TM3MD __SYSREG(0xd4003003, u8) /* timer 3 mode register */
87 #define TM01MD __SYSREG(0xd4003000, u16) /* timer 0:1 mode register */
89 #define TM0BR __SYSREG(0xd4003010, u8) /* timer 0 base register */
90 #define TM1BR __SYSREG(0xd4003011, u8) /* timer 1 base register */
91 #define TM2BR __SYSREG(0xd4003012, u8) /* timer 2 base register */
92 #define TM3BR __SYSREG(0xd4003013, u8) /* timer 3 base register */
93 #define TM01BR __SYSREG(0xd4003010, u16) /* timer 0:1 base register */
114 #define TM4MD __SYSREG(0xd4003080, u8) /* timer 4 mode register */
128 #define TM5MD __SYSREG(0xd4003082, u8) /* timer 5 mode register */
145 #define TM7MD __SYSREG(0xd4003086, u8) /* timer 7 mode register */
159 #define TM8MD __SYSREG(0xd4003088, u8) /* timer 8 mode register */
176 #define TM9MD __SYSREG(0xd400308a, u8) /* timer 9 mode register */
193 #define TM10MD __SYSREG(0xd400308c, u8) /* timer 10 mode register */
210 #define TM11MD __SYSREG(0xd400308e, u8) /* timer 11 mode register */
227 #define TM12MD __SYSREG(0xd4003180, u8) /* timer 11 mode register */
239 #define TM13MD __SYSREG(0xd4003182, u8) /* timer 11 mode register */
252 #define TM14MD __SYSREG(0xd4003184, u8) /* timer 11 mode register */
265 #define TM15MD __SYSREG(0xd4003186, u8) /* timer 11 mode register */
279 #define TM4BR __SYSREG(0xd4003090, u16) /* timer 4 base register */
280 #define TM5BR __SYSREG(0xd4003092, u16) /* timer 5 base register */
281 #define TM45BR __SYSREG(0xd4003090, u32) /* timer 4:5 base register */
282 #define TM7BR __SYSREG(0xd4003096, u16) /* timer 7 base register */
283 #define TM8BR __SYSREG(0xd4003098, u16) /* timer 8 base register */
284 #define TM9BR __SYSREG(0xd400309a, u16) /* timer 9 base register */
285 #define TM89BR __SYSREG(0xd4003098, u32) /* timer 8:9 base register */
286 #define TM10BR __SYSREG(0xd400309c, u16) /* timer 10 base register */
287 #define TM11BR __SYSREG(0xd400309e, u16) /* timer 11 base register */
289 #define TM12BR __SYSREG(0xd4003190, u16) /* timer 12 base register */
290 #define TM13BR __SYSREG(0xd4003192, u16) /* timer 13 base register */
291 #define TM14BR __SYSREG(0xd4003194, u16) /* timer 14 base register */
292 #define TM15BR __SYSREG(0xd4003196, u16) /* timer 15 base register */
295 #define TM4BC __SYSREG(0xd40030a0, u16) /* timer 4 binary counter */
296 #define TM5BC __SYSREG(0xd40030a2, u16) /* timer 5 binary counter */
297 #define TM45BC __SYSREG(0xd40030a0, u32) /* timer 4:5 binary counter */
298 #define TM7BC __SYSREG(0xd40030a6, u16) /* timer 7 binary counter */
299 #define TM8BC __SYSREG(0xd40030a8, u16) /* timer 8 binary counter */
300 #define TM9BC __SYSREG(0xd40030aa, u16) /* timer 9 binary counter */
301 #define TM89BC __SYSREG(0xd40030a8, u32) /* timer 8:9 binary counter */
302 #define TM10BC __SYSREG(0xd40030ac, u16) /* timer 10 binary counter */
303 #define TM11BC __SYSREG(0xd40030ae, u16) /* timer 11 binary counter */
305 #define TM12BC __SYSREG(0xd40031a0, u16) /* timer 12 binary counter */
306 #define TM13BC __SYSREG(0xd40031a2, u16) /* timer 13 binary counter */
307 #define TM14BC __SYSREG(0xd40031a4, u16) /* timer 14 binary counter */
308 #define TM15BC __SYSREG(0xd40031a6, u16) /* timer 15 binary counter */
342 #define TM6MD __SYSREG(0xd4003084, u16) /* timer6 mode register */
369 #define TM6MDA __SYSREG(0xd40030b4, u8) /* timer6 cmp/cap A mode reg */
390 #define TM6MDB __SYSREG(0xd40030b5, u8) /* timer6 cmp/cap B mode reg */
410 #define TM6CA __SYSREG(0xd40030c4, u16) /* timer6 cmp/capture reg A */
411 #define TM6CB __SYSREG(0xd40030d4, u16) /* timer6 cmp/capture reg B */
412 #define TM6BC __SYSREG(0xd40030a4, u16) /* timer6 binary counter */
426 #define TMTMD __SYSREG(0xd4004100, u8) /* Tick Timer mode register */
430 #define TMTBR __SYSREG(0xd4004110, u32) /* Tick Timer mode reg */
431 #define TMTBC __SYSREG(0xd4004120, u32) /* Tick Timer mode reg */
436 #define TMSMD __SYSREG(0xd4004140, u8) /* Tick Timer mode register */
440 #define TMSBR __SYSREG(0xd4004150, u32) /* Tick Timer mode register */
441 #define TMSBC __SYSREG(0xd4004160, u32) /* Tick Timer mode register */