Lines Matching refs:PIC_CMD
137 #define PIC_CMD 0x00 macro
139 #define PIC_ISR PIC_CMD
194 writeb(0x0B, rm200_pic_master + PIC_CMD); in sni_rm200_i8259A_irq_real()
195 value = readb(rm200_pic_master + PIC_CMD) & irqmask; in sni_rm200_i8259A_irq_real()
196 writeb(0x0A, rm200_pic_master + PIC_CMD); in sni_rm200_i8259A_irq_real()
199 writeb(0x0B, rm200_pic_slave + PIC_CMD); /* ISR register */ in sni_rm200_i8259A_irq_real()
200 value = readb(rm200_pic_slave + PIC_CMD) & (irqmask >> 8); in sni_rm200_i8259A_irq_real()
201 writeb(0x0A, rm200_pic_slave + PIC_CMD); in sni_rm200_i8259A_irq_real()
241 writeb(0x60+(irq & 7), rm200_pic_slave + PIC_CMD); in sni_rm200_mask_and_ack_8259A()
242 writeb(0x60+PIC_CASCADE_IR, rm200_pic_master + PIC_CMD); in sni_rm200_mask_and_ack_8259A()
246 writeb(0x60+irq, rm200_pic_master + PIC_CMD); in sni_rm200_mask_and_ack_8259A()
302 writeb(0x0C, rm200_pic_master + PIC_CMD); /* prepare for poll */ in sni_rm200_i8259_irq()
303 irq = readb(rm200_pic_master + PIC_CMD) & 7; in sni_rm200_i8259_irq()
309 writeb(0x0C, rm200_pic_slave + PIC_CMD); /* prepare for poll */ in sni_rm200_i8259_irq()
310 irq = (readb(rm200_pic_slave + PIC_CMD) & 7) + 8; in sni_rm200_i8259_irq()
340 writeb(0x11, rm200_pic_master + PIC_CMD); in sni_rm200_init_8259A()
344 writeb(0x11, rm200_pic_slave + PIC_CMD); in sni_rm200_init_8259A()