Lines Matching refs:PCI_BASE
56 unsigned long dram_r0_lo = inl(PCI_BASE | 0x65010); in get_system_mem_size()
58 unsigned long dram_r1_hi = inl(PCI_BASE | 0x65018); in get_system_mem_size()
89 outl(pci_mem_resource.start, PCI_BASE | PCI_BASE1_LO); in pnx8550_pci_setup()
90 outl(pci_mem_resource.end + 1, PCI_BASE | PCI_BASE1_HI); in pnx8550_pci_setup()
91 outl(pci_io_resource.start, PCI_BASE | PCI_BASE2_LO); in pnx8550_pci_setup()
92 outl(pci_io_resource.end, PCI_BASE | PCI_BASE2_HI); in pnx8550_pci_setup()
95 outl(0x00000001, PCI_BASE | PCI_IO); in pnx8550_pci_setup()
98 outl(0xca, PCI_BASE | PCI_UNLOCKREG); in pnx8550_pci_setup()
105 outl(0x00000000, PCI_BASE | PCI_BASE10); in pnx8550_pci_setup()
112 outl(0x1be00000, PCI_BASE | PCI_BASE14); /* PNX MMIO */ in pnx8550_pci_setup()
113 outl(PNX8550_NAND_BASE_ADDR, PCI_BASE | PCI_BASE18); /* XIO */ in pnx8550_pci_setup()
125 PCI_BASE | in pnx8550_pci_setup()
127 outl(0x00000000, PCI_BASE | PCI_CTRL); /* PCI_CONTROL */ in pnx8550_pci_setup()