Lines Matching refs:jz_clk_reg_set_bits
137 static void jz_clk_reg_set_bits(int reg, uint32_t mask) in jz_clk_reg_set_bits() function
173 jz_clk_reg_set_bits(JZ_REG_CLOCK_GATE, clk->gate_bit); in jz_clk_disable_gating()
192 jz_clk_reg_set_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_KO_ENABLE); in jz_clk_ko_enable()
386 jz_clk_reg_set_bits(JZ_CLOCK_SPI_SRC_PLL, JZ_REG_CLOCK_SPI); in jz_clk_spi_set_parent()
400 jz_clk_reg_set_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_I2S_SRC_PLL); in jz_clk_i2s_set_parent()
413 jz_clk_reg_set_bits(JZ_REG_CLOCK_SLEEP_CTRL, in jz_clk_udc_enable()
436 jz_clk_reg_set_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_UDC_SRC_PLL); in jz_clk_udc_set_parent()
853 jz_clk_reg_set_bits(JZ_REG_CLOCK_LOW_POWER, JZ_CLOCK_LOW_POWER_MODE_SLEEP); in jz4740_clock_set_wait_mode()
866 jz_clk_reg_set_bits(JZ_REG_CLOCK_GATE, JZ_CLOCK_GATE_UDC); in jz4740_clock_udc_enable_auto_suspend()
872 jz_clk_reg_set_bits(JZ_REG_CLOCK_GATE, in jz4740_clock_suspend()
882 jz_clk_reg_set_bits(JZ_REG_CLOCK_PLL, JZ_CLOCK_PLL_ENABLED); in jz4740_clock_resume()