26 void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, u64 bits)  in pcireg_control_bit_clr()  argument
28 	union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;  in pcireg_control_bit_clr()
30 	if (pcibus_info) {  in pcireg_control_bit_clr()
31 		switch (pcibus_info->pbi_bridge_type) {  in pcireg_control_bit_clr()
46 void pcireg_control_bit_set(struct pcibus_info *pcibus_info, u64 bits)  in pcireg_control_bit_set()  argument
48 	union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;  in pcireg_control_bit_set()
50 	if (pcibus_info) {  in pcireg_control_bit_set()
51 		switch (pcibus_info->pbi_bridge_type) {  in pcireg_control_bit_set()
69 u64 pcireg_tflush_get(struct pcibus_info *pcibus_info)  in pcireg_tflush_get()  argument
71 	union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;  in pcireg_tflush_get()
74 	if (pcibus_info) {  in pcireg_tflush_get()
75 		switch (pcibus_info->pbi_bridge_type) {  in pcireg_tflush_get()
99 u64 pcireg_intr_status_get(struct pcibus_info * pcibus_info)  in pcireg_intr_status_get()  argument
101 	union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;  in pcireg_intr_status_get()
104 	if (pcibus_info) {  in pcireg_intr_status_get()
105 		switch (pcibus_info->pbi_bridge_type) {  in pcireg_intr_status_get()
124 void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, u64 bits)  in pcireg_intr_enable_bit_clr()  argument
126 	union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;  in pcireg_intr_enable_bit_clr()
128 	if (pcibus_info) {  in pcireg_intr_enable_bit_clr()
129 		switch (pcibus_info->pbi_bridge_type) {  in pcireg_intr_enable_bit_clr()
144 void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, u64 bits)  in pcireg_intr_enable_bit_set()  argument
146 	union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;  in pcireg_intr_enable_bit_set()
148 	if (pcibus_info) {  in pcireg_intr_enable_bit_set()
149 		switch (pcibus_info->pbi_bridge_type) {  in pcireg_intr_enable_bit_set()
167 void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,  in pcireg_intr_addr_addr_set()  argument
170 	union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;  in pcireg_intr_addr_addr_set()
172 	if (pcibus_info) {  in pcireg_intr_addr_addr_set()
173 		switch (pcibus_info->pbi_bridge_type) {  in pcireg_intr_addr_addr_set()
197 void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)  in pcireg_force_intr_set()  argument
199 	union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;  in pcireg_force_intr_set()
201 	if (pcibus_info) {  in pcireg_force_intr_set()
202 		switch (pcibus_info->pbi_bridge_type) {  in pcireg_force_intr_set()
220 u64 pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)  in pcireg_wrb_flush_get()  argument
222 	union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;  in pcireg_wrb_flush_get()
225 	if (pcibus_info) {  in pcireg_wrb_flush_get()
226 		switch (pcibus_info->pbi_bridge_type) {  in pcireg_wrb_flush_get()
244 void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index,  in pcireg_int_ate_set()  argument
247 	union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;  in pcireg_int_ate_set()
249 	if (pcibus_info) {  in pcireg_int_ate_set()
250 		switch (pcibus_info->pbi_bridge_type) {  in pcireg_int_ate_set()
265 u64 __iomem *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)  in pcireg_int_ate_addr()  argument
267 	union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;  in pcireg_int_ate_addr()
270 	if (pcibus_info) {  in pcireg_int_ate_addr()
271 		switch (pcibus_info->pbi_bridge_type) {  in pcireg_int_ate_addr()