34 #define CCM_CSCR	IO_ADDR_CCM(0x0)  macro
134 	.enable_reg = CCM_CSCR,
169 	unsigned int reg = __raw_readl(CCM_CSCR);  in prem_clk_set_parent()
185 	__raw_writel(reg, CCM_CSCR);  in prem_clk_set_parent()
220 	if (__raw_readl(CCM_CSCR) & CCM_CSCR_PRESC)  in fclk_get_rate()
236 	return clk_get_rate(clk->parent) / (((__raw_readl(CCM_CSCR) &  in hclk_get_rate()
260 	reg = __raw_readl(CCM_CSCR);  in hclk_set_rate()
263 	__raw_writel(reg, CCM_CSCR);  in hclk_set_rate()
277 	return clk_get_rate(clk->parent) / (((__raw_readl(CCM_CSCR) &  in clk48m_get_rate()
301 	reg = __raw_readl(CCM_CSCR);  in clk48m_set_rate()
304 	__raw_writel(reg, CCM_CSCR);  in clk48m_set_rate()
467 	reg = __raw_readl(CCM_CSCR) & ~CCM_CSCR_CLKO_MASK;  in clko_set_parent()
469 	__raw_writel(reg, CCM_CSCR);  in clko_set_parent()
611 	reg = __raw_readl(CCM_CSCR);  in mx1_clocks_init()
619 		__raw_writel(reg, CCM_CSCR);  in mx1_clocks_init()