Lines Matching refs:C

63 	[C(L1D)] = {
64 		[C(OP_READ)] = {
65 			[C(RESULT_ACCESS)]	= XSCALE_PERFCTR_DCACHE_ACCESS,
66 			[C(RESULT_MISS)]	= XSCALE_PERFCTR_DCACHE_MISS,
68 		[C(OP_WRITE)] = {
69 			[C(RESULT_ACCESS)]	= XSCALE_PERFCTR_DCACHE_ACCESS,
70 			[C(RESULT_MISS)]	= XSCALE_PERFCTR_DCACHE_MISS,
72 		[C(OP_PREFETCH)] = {
73 			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,
74 			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,
77 	[C(L1I)] = {
78 		[C(OP_READ)] = {
79 			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,
80 			[C(RESULT_MISS)]	= XSCALE_PERFCTR_ICACHE_MISS,
82 		[C(OP_WRITE)] = {
83 			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,
84 			[C(RESULT_MISS)]	= XSCALE_PERFCTR_ICACHE_MISS,
86 		[C(OP_PREFETCH)] = {
87 			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,
88 			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,
91 	[C(LL)] = {
92 		[C(OP_READ)] = {
93 			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,
94 			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,
96 		[C(OP_WRITE)] = {
97 			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,
98 			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,
100 		[C(OP_PREFETCH)] = {
101 			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,
102 			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,
105 	[C(DTLB)] = {
106 		[C(OP_READ)] = {
107 			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,
108 			[C(RESULT_MISS)]	= XSCALE_PERFCTR_DTLB_MISS,
110 		[C(OP_WRITE)] = {
111 			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,
112 			[C(RESULT_MISS)]	= XSCALE_PERFCTR_DTLB_MISS,
114 		[C(OP_PREFETCH)] = {
115 			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,
116 			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,
119 	[C(ITLB)] = {
120 		[C(OP_READ)] = {
121 			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,
122 			[C(RESULT_MISS)]	= XSCALE_PERFCTR_ITLB_MISS,
124 		[C(OP_WRITE)] = {
125 			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,
126 			[C(RESULT_MISS)]	= XSCALE_PERFCTR_ITLB_MISS,
128 		[C(OP_PREFETCH)] = {
129 			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,
130 			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,
133 	[C(BPU)] = {
134 		[C(OP_READ)] = {
135 			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,
136 			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,
138 		[C(OP_WRITE)] = {
139 			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,
140 			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,
142 		[C(OP_PREFETCH)] = {
143 			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,
144 			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,