Lines Matching refs:JMR3927_IOC_BASE
51 #define JMR3927_IOC_BASE (KSEG1 + JMR3927_ROMCE2) macro
63 #define JMR3927_IOC_REV_ADDR (JMR3927_IOC_BASE + 0x00000000)
64 #define JMR3927_IOC_NVRAMB_ADDR (JMR3927_IOC_BASE + 0x00010000)
65 #define JMR3927_IOC_LED_ADDR (JMR3927_IOC_BASE + 0x00020000)
66 #define JMR3927_IOC_DIPSW_ADDR (JMR3927_IOC_BASE + 0x00030000)
67 #define JMR3927_IOC_BREV_ADDR (JMR3927_IOC_BASE + 0x00040000)
68 #define JMR3927_IOC_DTR_ADDR (JMR3927_IOC_BASE + 0x00050000)
69 #define JMR3927_IOC_INTS1_ADDR (JMR3927_IOC_BASE + 0x00080000)
70 #define JMR3927_IOC_INTS2_ADDR (JMR3927_IOC_BASE + 0x00090000)
71 #define JMR3927_IOC_INTM_ADDR (JMR3927_IOC_BASE + 0x000a0000)
72 #define JMR3927_IOC_INTP_ADDR (JMR3927_IOC_BASE + 0x000b0000)
73 #define JMR3927_IOC_RESET_ADDR (JMR3927_IOC_BASE + 0x000f0000)