Lines Matching refs:IO_BITNR
21 #define SOME_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, some) /* 0 ? */
22 #define NMI_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, nmi) /* 1 */
23 #define TIMER0_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, timer0) /* 2 */
24 #define TIMER1_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, timer1) /* 3 */
27 #define NETWORK_STATUS_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, network) /* 6 */
29 #define SERIAL_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, serial) /* 8 */
30 #define PA_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, pa) /* 11 */
32 #define EXTDMA0_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, ext_dma0)
33 #define EXTDMA1_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, ext_dma1)
40 #define DMA0_TX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma0)
41 #define DMA1_RX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma1)
46 #define DMA2_TX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma2)
47 #define DMA3_RX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma3)
52 #define DMA4_TX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma4)
53 #define DMA5_RX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma5)
58 #define DMA6_TX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma6)
59 #define DMA7_RX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma7)
66 #define DMA8_TX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma8)
67 #define DMA9_RX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma9)
74 #define USB_HC_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, usb)