Lines Matching refs:BT463_REG_ACC
548 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_0, 0x40); in tgafb_set_par()
549 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_1, 0x08); in tgafb_set_par()
550 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_2, in tgafb_set_par()
553 BT463_WRITE(BT463_REG_ACC, BT463_READ_MASK_0, 0xff); in tgafb_set_par()
554 BT463_WRITE(BT463_REG_ACC, BT463_READ_MASK_1, 0xff); in tgafb_set_par()
555 BT463_WRITE(BT463_REG_ACC, BT463_READ_MASK_2, 0xff); in tgafb_set_par()
556 BT463_WRITE(BT463_REG_ACC, BT463_READ_MASK_3, 0x0f); in tgafb_set_par()
558 BT463_WRITE(BT463_REG_ACC, BT463_BLINK_MASK_0, 0x00); in tgafb_set_par()
559 BT463_WRITE(BT463_REG_ACC, BT463_BLINK_MASK_1, 0x00); in tgafb_set_par()
560 BT463_WRITE(BT463_REG_ACC, BT463_BLINK_MASK_2, 0x00); in tgafb_set_par()
561 BT463_WRITE(BT463_REG_ACC, BT463_BLINK_MASK_3, 0x00); in tgafb_set_par()
590 TGA_WRITE_REG((BT463_REG_ACC<<2), TGA_RAMDAC_SETUP_REG); in tgafb_set_par()
593 TGA_WRITE_REG(0x00|(BT463_REG_ACC<<10), TGA_RAMDAC_REG); in tgafb_set_par()
594 TGA_WRITE_REG(0x01|(BT463_REG_ACC<<10), TGA_RAMDAC_REG); in tgafb_set_par()
595 TGA_WRITE_REG(0x80|(BT463_REG_ACC<<10), TGA_RAMDAC_REG); in tgafb_set_par()