44 	ACCESS_FBINFO(cursor.timer.expires) = jiffies + HZ/2;  in matroxfb_DAC1064_flashcursor()
45 	add_timer(&ACCESS_FBINFO(cursor.timer));  in matroxfb_DAC1064_flashcursor()
57 	if (ACCESS_FBINFO(currcon_display) != p)  in matroxfb_DAC1064_createcursor()
62 	xline = (~0) << (32 - ACCESS_FBINFO(cursor.w));  in matroxfb_DAC1064_createcursor()
63 	cursorbase = ACCESS_FBINFO(video.vbase);  in matroxfb_DAC1064_createcursor()
64 	h = ACCESS_FBINFO(features.DAC1064.cursorimage);  in matroxfb_DAC1064_createcursor()
72 	to = ACCESS_FBINFO(cursor.u);  in matroxfb_DAC1064_createcursor()
80 	to = ACCESS_FBINFO(cursor.d);  in matroxfb_DAC1064_createcursor()
96 	mga_outl(M_OPMODE, ACCESS_FBINFO(accel.m_opmode));  in matroxfb_DAC1064_createcursor()
106 	if (ACCESS_FBINFO(currcon_display) != p)  in matroxfb_DAC1064_cursor()
110 		if (ACCESS_FBINFO(cursor.state) != CM_ERASE) {  in matroxfb_DAC1064_cursor()
111 			del_timer_sync(&ACCESS_FBINFO(cursor.timer));  in matroxfb_DAC1064_cursor()
113 			ACCESS_FBINFO(cursor.state) = CM_ERASE;  in matroxfb_DAC1064_cursor()
119 	if ((p->conp->vc_cursor_type & CUR_HWMASK) != ACCESS_FBINFO(cursor.type))  in matroxfb_DAC1064_cursor()
126 	del_timer_sync(&ACCESS_FBINFO(cursor.timer));  in matroxfb_DAC1064_cursor()
128 …if ((x != ACCESS_FBINFO(cursor.x)) || (y != ACCESS_FBINFO(cursor.y)) || ACCESS_FBINFO(cursor.redra…  in matroxfb_DAC1064_cursor()
129 		ACCESS_FBINFO(cursor.redraw) = 0;  in matroxfb_DAC1064_cursor()
130 		ACCESS_FBINFO(cursor.x) = x;  in matroxfb_DAC1064_cursor()
131 		ACCESS_FBINFO(cursor.y) = y;  in matroxfb_DAC1064_cursor()
140 	ACCESS_FBINFO(cursor.state) = CM_DRAW;  in matroxfb_DAC1064_cursor()
141 	if (ACCESS_FBINFO(devflags.blink))  in matroxfb_DAC1064_cursor()
142 		mod_timer(&ACCESS_FBINFO(cursor.timer), jiffies + HZ/2);  in matroxfb_DAC1064_cursor()
154 	ACCESS_FBINFO(dispsw.cursor) = matroxfb_DAC1064_cursor;  in DAC1064_selhwcursor()
155 	ACCESS_FBINFO(dispsw.set_font) = matroxfb_DAC1064_setfont;  in DAC1064_selhwcursor()
211 	DAC1064_calcclock(PMINFO fout, ACCESS_FBINFO(max_pixel_clock), &m, &n, &p);  in DAC1064_setpclk()
212 	ACCESS_FBINFO(hw).DACclk[0] = m;  in DAC1064_setpclk()
213 	ACCESS_FBINFO(hw).DACclk[1] = n;  in DAC1064_setpclk()
214 	ACCESS_FBINFO(hw).DACclk[2] = p;  in DAC1064_setpclk()
219 	struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);  in DAC1064_setmclk()
223 	if (ACCESS_FBINFO(devflags.noinit)) {  in DAC1064_setmclk()
231 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, mx);  in DAC1064_setmclk()
246 		pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, mx);  in DAC1064_setmclk()
248 		pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, mx);  in DAC1064_setmclk()
257 		DAC1064_calcclock(PMINFO fmem, ACCESS_FBINFO(max_pixel_clock), &m, &n, &p);  in DAC1064_setmclk()
273 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, mx);  in DAC1064_setmclk()
275 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, mx);  in DAC1064_setmclk()
283 	struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);  in g450_set_plls()
290 	pixelmnp = ACCESS_FBINFO(crtc1).mnp;  in g450_set_plls()
291 	videomnp = ACCESS_FBINFO(crtc2).mnp;  in g450_set_plls()
295 	} else if (ACCESS_FBINFO(crtc2).pixclock == ACCESS_FBINFO(features).pll.ref_freq) {  in g450_set_plls()
326 	pxc = ACCESS_FBINFO(crtc1).pixclock;  in g450_set_plls()
327 	if (pxc == 0 || ACCESS_FBINFO(outputs[2]).src == MATROXFB_SRC_CRTC2) {  in g450_set_plls()
328 		pxc = ACCESS_FBINFO(crtc2).pixclock;  in g450_set_plls()
330 	if (ACCESS_FBINFO(chip) == MGA_G550) {  in g450_set_plls()
372 	struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);  in DAC1064_global_init()
378 	if (ACCESS_FBINFO(devflags.g450dac)) {  in DAC1064_global_init()
382 		switch (ACCESS_FBINFO(outputs[0]).src) {  in DAC1064_global_init()
391 		switch (ACCESS_FBINFO(outputs[1]).src) {  in DAC1064_global_init()
396 				if (ACCESS_FBINFO(outputs[1]).mode == MATROXFB_OUTPUT_MODE_MONITOR) {  in DAC1064_global_init()
406 		switch (ACCESS_FBINFO(outputs[2]).src) {  in DAC1064_global_init()
429 		if (ACCESS_FBINFO(outputs[1]).src == MATROXFB_SRC_CRTC1) {  in DAC1064_global_init()
432 		} else if (ACCESS_FBINFO(outputs[1]).src == MATROXFB_SRC_CRTC2) {  in DAC1064_global_init()
434 		} else if (ACCESS_FBINFO(outputs[2]).src == MATROXFB_SRC_CRTC1)  in DAC1064_global_init()
439 		if (ACCESS_FBINFO(outputs[0]).src != MATROXFB_SRC_NONE)  in DAC1064_global_init()
445 	struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);  in DAC1064_global_restore()
449 	if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400) {  in DAC1064_global_restore()
451 		outDAC1064(PMINFO 0x1F, ACCESS_FBINFO(devflags.dfp_type));  in DAC1064_global_restore()
452 		if (ACCESS_FBINFO(devflags.g450dac)) {  in DAC1064_global_restore()
462 	struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);  in DAC1064_init_1()
493 	hw->DACreg[POS1064_XVREFCTRL] = ACCESS_FBINFO(features.DAC1064.xvrefctrl);  in DAC1064_init_1()
496 	hw->DACreg[POS1064_XCURADDL] = ACCESS_FBINFO(features.DAC1064.cursorimage) >> 10;  in DAC1064_init_1()
497 	hw->DACreg[POS1064_XCURADDH] = ACCESS_FBINFO(features.DAC1064.cursorimage) >> 18;  in DAC1064_init_1()
504 	struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);  in DAC1064_init_2()
546 	struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);  in DAC1064_restore_1()
586 		dprintk("R%02X=%02X ", MGA1064_DAC_regs[i], ACCESS_FBINFO(hw).DACreg[i]);  in DAC1064_restore_2()
591 		dprintk("C%02X=%02X ", i, ACCESS_FBINFO(hw).DACclk[i]);  in DAC1064_restore_2()
608 			outDAC1064(PMINFO M1064_XPIXPLLCM + i, ACCESS_FBINFO(hw).DACclk[i]);  in m1064_compute()
654 	struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);  in MGA1064_init()
676 	struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);  in MGAG100_init()
703 	ACCESS_FBINFO(features.pll.vco_freq_min) = 62000;  in MGA1064_ramdac_init()
704 	ACCESS_FBINFO(features.pll.ref_freq)	 = 14318;  in MGA1064_ramdac_init()
705 	ACCESS_FBINFO(features.pll.feed_div_min) = 100;  in MGA1064_ramdac_init()
706 	ACCESS_FBINFO(features.pll.feed_div_max) = 127;  in MGA1064_ramdac_init()
707 	ACCESS_FBINFO(features.pll.in_div_min)	 = 1;  in MGA1064_ramdac_init()
708 	ACCESS_FBINFO(features.pll.in_div_max)	 = 31;  in MGA1064_ramdac_init()
709 	ACCESS_FBINFO(features.pll.post_shift_max) = 3;  in MGA1064_ramdac_init()
710 	ACCESS_FBINFO(features.DAC1064.xvrefctrl) = DAC1064_XVREFCTRL_EXTERNAL;  in MGA1064_ramdac_init()
773 	DAC1064_calcclock(PMINFO freq, ACCESS_FBINFO(max_pixel_clock), &m, &n, &p);  in MGAG100_setPixClock()
783 	struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);  in MGA1064_preinit()
788 	ACCESS_FBINFO(capable.text) = 1;  in MGA1064_preinit()
789 	ACCESS_FBINFO(capable.vxres) = vxres_mystique;  in MGA1064_preinit()
790 	ACCESS_FBINFO(features.accel.has_cacheflush) = 1;  in MGA1064_preinit()
791 	ACCESS_FBINFO(cursor.timer.function) = matroxfb_DAC1064_flashcursor;  in MGA1064_preinit()
793 	ACCESS_FBINFO(outputs[0]).output = &m1064;  in MGA1064_preinit()
794 	ACCESS_FBINFO(outputs[0]).src = MATROXFB_SRC_CRTC1;  in MGA1064_preinit()
795 	ACCESS_FBINFO(outputs[0]).data = MINFO;  in MGA1064_preinit()
796 	ACCESS_FBINFO(outputs[0]).mode = MATROXFB_OUTPUT_MODE_MONITOR;  in MGA1064_preinit()
798 	if (ACCESS_FBINFO(devflags.noinit))  in MGA1064_preinit()
802 	if (ACCESS_FBINFO(devflags.novga))  in MGA1064_preinit()
804 	if (ACCESS_FBINFO(devflags.nobios))  in MGA1064_preinit()
806 	if (ACCESS_FBINFO(devflags.nopciretry))  in MGA1064_preinit()
808 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, hw->MXoptionReg);  in MGA1064_preinit()
822 	ACCESS_FBINFO(features.DAC1064.cursorimage) = ACCESS_FBINFO(video.len_usable) - 1024;  in MGA1064_reset()
823 	if (ACCESS_FBINFO(devflags.hwcursor))  in MGA1064_reset()
824 		ACCESS_FBINFO(video.len_usable) -= 1024;  in MGA1064_reset()
834 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, ACCESS_FBINFO(hw).MXoptionReg | 4);  in g450_mclk_init()
835 …pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION3_REG, ACCESS_FBINFO(values).reg.opt3 & ~0…  in g450_mclk_init()
836 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, ACCESS_FBINFO(hw).MXoptionReg);  in g450_mclk_init()
838 	if (((ACCESS_FBINFO(values).reg.opt3 & 0x000003) == 0x000003) ||  in g450_mclk_init()
839 	    ((ACCESS_FBINFO(values).reg.opt3 & 0x000C00) == 0x000C00) ||  in g450_mclk_init()
840 	    ((ACCESS_FBINFO(values).reg.opt3 & 0x300000) == 0x300000)) {  in g450_mclk_init()
841 		matroxfb_g450_setclk(PMINFO ACCESS_FBINFO(values.pll.video), M_VIDEO_PLL);  in g450_mclk_init()
851 	matroxfb_g450_setclk(PMINFO ACCESS_FBINFO(values.pll.system), M_SYSTEM_PLL);  in g450_mclk_init()
854 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, ACCESS_FBINFO(hw).MXoptionReg | 4);  in g450_mclk_init()
855 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION3_REG, ACCESS_FBINFO(values).reg.opt3);  in g450_mclk_init()
856 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, ACCESS_FBINFO(hw).MXoptionReg);  in g450_mclk_init()
862 	ACCESS_FBINFO(hw).MXoptionReg &= ~0x001F8000;  in g450_memory_init()
863 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, ACCESS_FBINFO(hw).MXoptionReg);  in g450_memory_init()
866 	ACCESS_FBINFO(hw).MXoptionReg &= ~0x00207E00;  in g450_memory_init()
867 	ACCESS_FBINFO(hw).MXoptionReg |= 0x00207E00 & ACCESS_FBINFO(values).reg.opt;  in g450_memory_init()
868 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, ACCESS_FBINFO(hw).MXoptionReg);  in g450_memory_init()
869 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION2_REG, ACCESS_FBINFO(values).reg.opt2);  in g450_memory_init()
871 	mga_outl(M_CTLWTST, ACCESS_FBINFO(values).reg.mctlwtst);  in g450_memory_init()
874 …pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_MEMMISC_REG, ACCESS_FBINFO(values).reg.memmisc &…  in g450_memory_init()
875 	mga_outl(M_MEMRDBK, ACCESS_FBINFO(values).reg.memrdbk);  in g450_memory_init()
876 	mga_outl(M_MACCESS, ACCESS_FBINFO(values).reg.maccess);  in g450_memory_init()
878 …pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_MEMMISC_REG, ACCESS_FBINFO(values).reg.memmisc |…  in g450_memory_init()
882 …if (ACCESS_FBINFO(values).memory.ddr && (!ACCESS_FBINFO(values).memory.emrswen || !ACCESS_FBINFO(v…  in g450_memory_init()
883 		mga_outl(M_MEMRDBK, ACCESS_FBINFO(values).reg.memrdbk & ~0x1000);  in g450_memory_init()
885 	mga_outl(M_MACCESS, ACCESS_FBINFO(values).reg.maccess | 0x8000);  in g450_memory_init()
889 	ACCESS_FBINFO(hw).MXoptionReg |= 0x001F8000 & ACCESS_FBINFO(values).reg.opt;  in g450_memory_init()
890 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, ACCESS_FBINFO(hw).MXoptionReg);  in g450_memory_init()
896 	if (ACCESS_FBINFO(values).reg.mctlwtst != ACCESS_FBINFO(values).reg.mctlwtst_core) {  in g450_memory_init()
897 		mga_outl(M_CTLWTST, ACCESS_FBINFO(values).reg.mctlwtst_core);  in g450_memory_init()
908 	ACCESS_FBINFO(hw).MXoptionReg &= 0xC0000100;  in g450_preinit()
909 	ACCESS_FBINFO(hw).MXoptionReg |= 0x00000020;  in g450_preinit()
910 	if (ACCESS_FBINFO(devflags.novga))  in g450_preinit()
911 		ACCESS_FBINFO(hw).MXoptionReg &= ~0x00000100;  in g450_preinit()
912 	if (ACCESS_FBINFO(devflags.nobios))  in g450_preinit()
913 		ACCESS_FBINFO(hw).MXoptionReg &= ~0x40000000;  in g450_preinit()
914 	if (ACCESS_FBINFO(devflags.nopciretry))  in g450_preinit()
915 		ACCESS_FBINFO(hw).MXoptionReg |=  0x20000000;  in g450_preinit()
916 	ACCESS_FBINFO(hw).MXoptionReg |= ACCESS_FBINFO(values).reg.opt & 0x03400040;  in g450_preinit()
917 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, ACCESS_FBINFO(hw).MXoptionReg);  in g450_preinit()
958 	struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);  in MGAG100_preinit()
968 	if (ACCESS_FBINFO(devflags.g450dac)) {  in MGAG100_preinit()
969 		ACCESS_FBINFO(features.pll.vco_freq_min) = 130000;	/* my sample: >118 */  in MGAG100_preinit()
971 		ACCESS_FBINFO(features.pll.vco_freq_min) = 62000;  in MGAG100_preinit()
973 	if (!ACCESS_FBINFO(features.pll.ref_freq)) {  in MGAG100_preinit()
974 		ACCESS_FBINFO(features.pll.ref_freq)	 = 27000;  in MGAG100_preinit()
976 	ACCESS_FBINFO(features.pll.feed_div_min) = 7;  in MGAG100_preinit()
977 	ACCESS_FBINFO(features.pll.feed_div_max) = 127;  in MGAG100_preinit()
978 	ACCESS_FBINFO(features.pll.in_div_min)	 = 1;  in MGAG100_preinit()
979 	ACCESS_FBINFO(features.pll.in_div_max)	 = 31;  in MGAG100_preinit()
980 	ACCESS_FBINFO(features.pll.post_shift_max) = 3;  in MGAG100_preinit()
981 	ACCESS_FBINFO(features.DAC1064.xvrefctrl) = DAC1064_XVREFCTRL_G100_DEFAULT;  in MGAG100_preinit()
983 	ACCESS_FBINFO(capable.text) = 1;  in MGAG100_preinit()
984 	ACCESS_FBINFO(capable.vxres) = vxres_g100;  in MGAG100_preinit()
985 	ACCESS_FBINFO(features.accel.has_cacheflush) = 1;  in MGAG100_preinit()
986 	ACCESS_FBINFO(cursor.timer.function) = matroxfb_DAC1064_flashcursor;  in MGAG100_preinit()
987 	ACCESS_FBINFO(capable.plnwt) = ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG100  in MGAG100_preinit()
988 			? ACCESS_FBINFO(devflags.sgram) : 1;  in MGAG100_preinit()
991 	if (ACCESS_FBINFO(devflags.g450dac)) {  in MGAG100_preinit()
992 		ACCESS_FBINFO(outputs[0]).output = &g450out;  in MGAG100_preinit()
996 		ACCESS_FBINFO(outputs[0]).output = &m1064;  in MGAG100_preinit()
998 	ACCESS_FBINFO(outputs[0]).src = MATROXFB_SRC_CRTC1;  in MGAG100_preinit()
999 	ACCESS_FBINFO(outputs[0]).data = MINFO;  in MGAG100_preinit()
1000 	ACCESS_FBINFO(outputs[0]).mode = MATROXFB_OUTPUT_MODE_MONITOR;  in MGAG100_preinit()
1002 	if (ACCESS_FBINFO(devflags.g450dac)) {  in MGAG100_preinit()
1007 	if (ACCESS_FBINFO(devflags.noinit))  in MGAG100_preinit()
1009 	if (ACCESS_FBINFO(devflags.g450dac)) {  in MGAG100_preinit()
1015 	if (ACCESS_FBINFO(devflags.novga))  in MGAG100_preinit()
1017 	if (ACCESS_FBINFO(devflags.nobios))  in MGAG100_preinit()
1019 	if (ACCESS_FBINFO(devflags.nopciretry))  in MGAG100_preinit()
1021 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, hw->MXoptionReg);  in MGAG100_preinit()
1024 	if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG100) {  in MGAG100_preinit()
1025 		pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION2_REG, &reg50);  in MGAG100_preinit()
1027 		pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION2_REG, reg50);  in MGAG100_preinit()
1030 		pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, hw->MXoptionReg);  in MGAG100_preinit()
1031 		mga_outl(M_CTLWTST, ACCESS_FBINFO(values).reg.mctlwtst);  in MGAG100_preinit()
1041 		pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION2_REG, reg50);  in MGAG100_preinit()
1047 		mga_writeb(ACCESS_FBINFO(video.vbase), 0x0000, 0xAA);  in MGAG100_preinit()
1048 		mga_writeb(ACCESS_FBINFO(video.vbase), 0x0800, 0x55);  in MGAG100_preinit()
1049 		mga_writeb(ACCESS_FBINFO(video.vbase), 0x4000, 0x55);  in MGAG100_preinit()
1051 		if (mga_readb(ACCESS_FBINFO(video.vbase), 0x0000) != 0xAA) {  in MGAG100_preinit()
1056 	} else if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG200) {  in MGAG100_preinit()
1057 		pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION2_REG, &reg50);  in MGAG100_preinit()
1059 		pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION2_REG, reg50);  in MGAG100_preinit()
1061 		if (ACCESS_FBINFO(devflags.memtype) == -1)  in MGAG100_preinit()
1062 			hw->MXoptionReg |= ACCESS_FBINFO(values).reg.opt & 0x1C00;  in MGAG100_preinit()
1064 			hw->MXoptionReg |= (ACCESS_FBINFO(devflags.memtype) & 7) << 10;  in MGAG100_preinit()
1065 		if (ACCESS_FBINFO(devflags.sgram))  in MGAG100_preinit()
1067 		mga_outl(M_CTLWTST, ACCESS_FBINFO(values).reg.mctlwtst);  in MGAG100_preinit()
1068 		mga_outl(M_MEMRDBK, ACCESS_FBINFO(values).reg.memrdbk);  in MGAG100_preinit()
1073 		mga_outw(M_MEMRDBK, ACCESS_FBINFO(values).reg.memrdbk);  in MGAG100_preinit()
1076 		pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION2_REG, &reg50);  in MGAG100_preinit()
1079 		pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION2_REG, reg50);  in MGAG100_preinit()
1081 		if (ACCESS_FBINFO(devflags.memtype) == -1)  in MGAG100_preinit()
1082 			hw->MXoptionReg |= ACCESS_FBINFO(values).reg.opt & 0x1C00;  in MGAG100_preinit()
1084 			hw->MXoptionReg |= (ACCESS_FBINFO(devflags.memtype) & 7) << 10;  in MGAG100_preinit()
1085 		if (ACCESS_FBINFO(devflags.sgram))  in MGAG100_preinit()
1087 		mga_outl(M_CTLWTST, ACCESS_FBINFO(values).reg.mctlwtst);  in MGAG100_preinit()
1088 		mga_outl(M_MEMRDBK, ACCESS_FBINFO(values).reg.memrdbk);  in MGAG100_preinit()
1093 		mga_outl(M_MEMRDBK, ACCESS_FBINFO(values).reg.memrdbk);  in MGAG100_preinit()
1096 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, hw->MXoptionReg);  in MGAG100_preinit()
1102 	struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);  in MGAG100_reset()
1106 	ACCESS_FBINFO(features.DAC1064.cursorimage) = ACCESS_FBINFO(video.len_usable) - 1024;  in MGAG100_reset()
1107 	if (ACCESS_FBINFO(devflags.hwcursor))  in MGAG100_reset()
1108 		ACCESS_FBINFO(video.len_usable) -= 1024;  in MGAG100_reset()
1117 		if (b == ACCESS_FBINFO(pcidev)->bus->number) {  in MGAG100_reset()
1124 		if (!ACCESS_FBINFO(devflags.noinit)) {  in MGAG100_reset()
1127 				pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, hw->MXoptionReg);  in MGAG100_reset()
1132 	if (ACCESS_FBINFO(devflags.g450dac)) {  in MGAG100_reset()
1140 	if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400) {  in MGAG100_reset()
1141 		if (ACCESS_FBINFO(devflags.dfp_type) == -1) {  in MGAG100_reset()
1142 			ACCESS_FBINFO(devflags.dfp_type) = inDAC1064(PMINFO 0x1F);  in MGAG100_reset()
1145 	if (ACCESS_FBINFO(devflags.noinit))  in MGAG100_reset()
1147 	if (ACCESS_FBINFO(devflags.g450dac)) {  in MGAG100_reset()
1164 	struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);  in MGA1064_restore()
1172 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, hw->MXoptionReg);  in MGA1064_restore()
1180 	ACCESS_FBINFO(crtc1.panpos) = -1;  in MGA1064_restore()
1190 	struct matrox_hw_state* hw = &ACCESS_FBINFO(hw);  in MGAG100_restore()
1198 	pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, hw->MXoptionReg);  in MGAG100_restore()
1204 	if (ACCESS_FBINFO(devflags.support32MB))  in MGAG100_restore()
1207 	ACCESS_FBINFO(crtc1.panpos) = -1;  in MGAG100_restore()