514 #define aty_ld_le32(regindex)		_aty_ld_le32(regindex, info)  macro
532     return aty_ld_le32(CLOCK_CNTL_DATA);  in _aty_ld_pll()
588     val = aty_ld_le32(BIOS_0_SCRATCH);  in register_test()
591     if (aty_ld_le32(BIOS_0_SCRATCH) == 0x55555555) {  in register_test()
594 	if (aty_ld_le32(BIOS_0_SCRATCH) == 0xAAAAAAAA)  in register_test()
613             info->fifo_slots = aty_ld_le32(GUI_STAT) & 0x0fff;  in do_wait_for_fifo()
631             if (!(aty_ld_le32(GUI_STAT) & (1 << 31))) {  in wait_for_idle()
657     tmp = aty_ld_le32(PC_NGUI_CTLSTAT);  in aty128_flush_pixel_cache()
663         if (!(aty_ld_le32(PC_NGUI_CTLSTAT) & PC_BUSY))  in aty128_flush_pixel_cache()
675     clock_cntl_index = aty_ld_le32(CLOCK_CNTL_INDEX);  in aty128_reset_engine()
680     gen_reset_cntl = aty_ld_le32(GEN_RESET_CNTL);  in aty128_reset_engine()
682     aty_ld_le32(GEN_RESET_CNTL);  in aty128_reset_engine()
684     aty_ld_le32(GEN_RESET_CNTL);  in aty128_reset_engine()
1068 	aty_st_le32(CRTC_EXT_CNTL, aty_ld_le32(CRTC_EXT_CNTL) | CRT_CRTC_ON);  in aty128_set_crt_enable()
1069 	aty_st_le32(DAC_CNTL, (aty_ld_le32(DAC_CNTL) | DAC_PALETTE2_SNOOP_EN));  in aty128_set_crt_enable()
1071 	aty_st_le32(CRTC_EXT_CNTL, aty_ld_le32(CRTC_EXT_CNTL) & ~CRT_CRTC_ON);  in aty128_set_crt_enable()
1080 	reg = aty_ld_le32(LVDS_GEN_CNTL);  in aty128_set_lcd_enable()
1091 	reg = aty_ld_le32(LVDS_GEN_CNTL);  in aty128_set_lcd_enable()
1109     aty_st_le32(CLOCK_CNTL_INDEX, aty_ld_le32(CLOCK_CNTL_INDEX) | (3 << 8));  in aty128_set_pll()
1311     config = aty_ld_le32(CONFIG_CNTL) & ~3;  in aty128_set_par()
1726         aty_st_le32(DAC_CNTL, aty_ld_le32(DAC_CNTL) | DAC_PALETTE_ACCESS_CNTL);  in aty128_st_pal()
1730         aty_st_le32(DAC_CNTL, aty_ld_le32(DAC_CNTL) & ~DAC_PALETTE_ACCESS_CNTL);  in aty128_st_pal()
1827 	info->vram_size = aty_ld_le32(CONFIG_MEMSIZE) & 0x03FFFFFF;  in aty128_init()
1830     chip_rev = (aty_ld_le32(CONFIG_CNTL) >> 16) & 0x1F;  in aty128_init()
1926     dac = aty_ld_le32(DAC_CNTL);  in aty128_init()
1934     aty_st_le32(BUS_CNTL, aty_ld_le32(BUS_CNTL) | BUS_MASTER_DIS);  in aty128_init()
2060 	info->vram_size = aty_ld_le32(CONFIG_MEMSIZE) & 0x03FFFFFF;  in aty128_pci_register()
2283     switch (aty_ld_le32(MEM_CNTL) & 0x3) {  in aty128_timings()
2534 	unsigned int reg = aty_ld_le32(LVDS_GEN_CNTL);  in aty128_set_backlight_enable()
2544 			(void)aty_ld_le32(LVDS_GEN_CNTL);  in aty128_set_backlight_enable()
2557 		aty_st_le32(DAC_CNTL, aty_ld_le32(DAC_CNTL) & (~DAC_PDWN));  in aty128_set_backlight_enable()
2565 		(void)aty_ld_le32(LVDS_GEN_CNTL);  in aty128_set_backlight_enable()
2571 		aty_st_le32(DAC_CNTL, aty_ld_le32(DAC_CNTL) | DAC_PDWN);  in aty128_set_backlight_enable()
2610     save_dp_datatype = aty_ld_le32(DP_DATATYPE);  in aty128_rectcopy()
2611     save_dp_cntl     = aty_ld_le32(DP_CNTL);  in aty128_rectcopy()
2862 		aty_st_le32(CRTC2_GEN_CNTL, aty_ld_le32(CRTC2_GEN_CNTL) &  in aty128_set_suspend()