Lines Matching refs:aty_st_8
66 aty_st_8(CLOCK_CNTL + info->clk_wr_offset, tmp | CLOCK_STROBE, info); in aty_StrobeClock()
78 aty_st_8(DAC_CNTL, 1, info); in aty_st_514()
80 aty_st_8(DAC_W_INDEX, offset & 0xff, info); in aty_st_514()
82 aty_st_8(DAC_DATA, (offset >> 8) & 0xff, info); in aty_st_514()
83 aty_st_8(DAC_MASK, val, info); in aty_st_514()
84 aty_st_8(DAC_CNTL, 0, info); in aty_st_514()
235 aty_st_8(DAC_CNTL, (temp & ~DAC_EXT_SEL_RS2) | DAC_EXT_SEL_RS3, info); in aty_set_dac_ATI68860_B()
237 aty_st_8(DAC_REGS + 2, 0x1D, info); in aty_set_dac_ATI68860_B()
238 aty_st_8(DAC_REGS + 3, gModeReg, info); in aty_set_dac_ATI68860_B()
239 aty_st_8(DAC_REGS, 0x02, info); in aty_set_dac_ATI68860_B()
242 aty_st_8(DAC_CNTL, temp | DAC_EXT_SEL_RS2 | DAC_EXT_SEL_RS3, info); in aty_set_dac_ATI68860_B()
257 aty_st_8(DAC_REGS, (devSetupRegA | mask) | (temp & A860_DELAY_L), info); in aty_set_dac_ATI68860_B()
259 aty_st_8(DAC_CNTL, (temp & ~(DAC_EXT_SEL_RS2 | DAC_EXT_SEL_RS3)), info); in aty_set_dac_ATI68860_B()
311 aty_st_8(DAC_REGS + 2, DACMask, info); in aty_set_dac_ATT21C498()
398 aty_st_8(CLOCK_CNTL + info->clk_wr_offset, (tmp & ~0x04) | (data << 2), in aty_ICS2595_put1bit()
402 aty_st_8(CLOCK_CNTL + info->clk_wr_offset, (tmp & ~0x08) | (0 << 3), info); in aty_ICS2595_put1bit()
407 aty_st_8(CLOCK_CNTL + info->clk_wr_offset, (tmp & ~0x08) | (1 << 3), info); in aty_ICS2595_put1bit()
426 aty_st_8(CLOCK_CNTL + info->clk_wr_offset, 0, info); in aty_set_pll18818()
429 aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp | (CRTC_EXT_DISP_EN >> 24), in aty_set_pll18818()
438 aty_st_8(CLOCK_CNTL + info->clk_wr_offset, 0, info); /* Strobe = 0 */ in aty_set_pll18818()
440 aty_st_8(CLOCK_CNTL + info->clk_wr_offset, 1, info); /* Strobe = 0 */ in aty_set_pll18818()
460 aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp, info); in aty_set_pll18818()
461 aty_st_8(CLOCK_CNTL + info->clk_wr_offset, old_clock_cntl | CLOCK_STROBE, in aty_set_pll18818()
465 aty_st_8(CLOCK_CNTL + info->clk_wr_offset, in aty_set_pll18818()
564 aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp | (CRTC_EXT_DISP_EN >> 24), in aty_set_pll_1703()
574 aty_st_8(DAC_REGS+2, (locationAddr << 1) + 0x20, info); in aty_set_pll_1703()
575 aty_st_8(DAC_REGS+2, 0, info); in aty_set_pll_1703()
576 aty_st_8(DAC_REGS+2, (program_bits & 0xFF00) >> 8, info); in aty_set_pll_1703()
577 aty_st_8(DAC_REGS+2, (program_bits & 0xFF), info); in aty_set_pll_1703()
580 aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp, info); in aty_set_pll_1703()
690 aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp | (CRTC_EXT_DISP_EN >> 24), in aty_set_pll_8398()
698 aty_st_8(DAC_CNTL, tmp | DAC_EXT_SEL_RS2 | DAC_EXT_SEL_RS3, info); in aty_set_pll_8398()
700 aty_st_8(DAC_REGS, locationAddr, info); in aty_set_pll_8398()
701 aty_st_8(DAC_REGS+1, (program_bits & 0xff00) >> 8, info); in aty_set_pll_8398()
702 aty_st_8(DAC_REGS+1, (program_bits & 0xff), info); in aty_set_pll_8398()
705 aty_st_8(DAC_CNTL, (tmp & ~DAC_EXT_SEL_RS2) | DAC_EXT_SEL_RS3, info); in aty_set_pll_8398()
708 aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp, info); in aty_set_pll_8398()
804 aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp | (CRTC_EXT_DISP_EN >> 24), in aty_set_pll_408()
814 aty_st_8(DAC_REGS + 2, tmpB, info); in aty_set_pll_408()
821 aty_st_8(DAC_REGS, tmpB, info); in aty_set_pll_408()
822 aty_st_8(DAC_REGS + 2, tmpA, info); in aty_set_pll_408()
830 aty_st_8(DAC_REGS, tmpB, info); in aty_set_pll_408()
831 aty_st_8(DAC_REGS + 2, tmpA, info); in aty_set_pll_408()
836 aty_st_8(DAC_REGS, tmpB, info); in aty_set_pll_408()
837 aty_st_8(DAC_REGS + 2, tmpA, info); in aty_set_pll_408()
842 aty_st_8(DAC_REGS, tmpB, info); in aty_set_pll_408()
843 aty_st_8(DAC_REGS + 2, tmpA, info); in aty_set_pll_408()
849 aty_st_8(DAC_REGS, tmpB, info); in aty_set_pll_408()
850 aty_st_8(DAC_REGS + 2, tmpA, info); in aty_set_pll_408()
853 aty_st_8(CRTC_GEN_CNTL + 3, old_crtc_ext_disp, info); in aty_set_pll_408()