224 			u32	master;  in ep_reset()  local
226 			master = readl(&regs->dma_master) & MST_RW_BITS;  in ep_reset()
228 				master &= ~MST_W_BITS;  in ep_reset()
229 				master |= MST_WR_RESET;  in ep_reset()
231 				master &= ~MST_R_BITS;  in ep_reset()
232 				master |= MST_RD_RESET;  in ep_reset()
234 			writel(master, &regs->dma_master);  in ep_reset()
619 	u32			master;  in start_dma()  local
623 	master = readl(&regs->dma_master) & MST_RW_BITS;  in start_dma()
627 		if (unlikely(master & MST_RD_ENA)) {  in start_dma()
629 				master);  in start_dma()
635 		master &= ~MST_R_BITS;  in start_dma()
637 			master = MST_RD_ENA | MST_RD_EOPB;  in start_dma()
640 			master = MST_RD_ENA | MST_EOPB_ENA;  in start_dma()
642 			master = MST_RD_ENA | MST_EOPB_DIS;  in start_dma()
652 		if (unlikely(master & MST_WR_ENA)) {  in start_dma()
654 				master);  in start_dma()
660 		master &= ~MST_W_BITS;  in start_dma()
661 		master |= MST_WR_ENA | MST_TIMEOUT_DIS;  in start_dma()
666 	writel(master, &regs->dma_master);  in start_dma()
675 	u32			master;  in dma_advance()  local
677 	master = readl(&regs->dma_master);  in dma_advance()
692 		if (unlikely(master & MST_RD_ENA))  in dma_advance()
696 		if (unlikely(master & MST_WR_ENA))  in dma_advance()
723 	u32			curr, master;  in abort_dma()  local
734 	master = readl(&regs->dma_master) & MST_RW_BITS;  in abort_dma()
749 		master &= ~MST_R_BITS;  in abort_dma()
750 		master |= MST_RD_RESET;  in abort_dma()
751 		writel(master, &regs->dma_master);  in abort_dma()
764 		master &= ~MST_W_BITS;  in abort_dma()
765 		master |= MST_WR_RESET;  in abort_dma()
766 		writel(master, &regs->dma_master);  in abort_dma()