151 		data |= inl(card->iobase + reg) & ~mask;  in emu10k1_writefn0()
152 		outl(data, card->iobase + reg);  in emu10k1_writefn0()
156 		outl(data, card->iobase + reg);  in emu10k1_writefn0()
178 		val = inl(card->iobase + reg);  in emu10k1_readfn0()
184 		val = inl(card->iobase + reg);  in emu10k1_readfn0()
195 	outw(data & TIMER_RATE_MASK, card->iobase + TIMER);  in emu10k1_timer_set()
220 		outl(regptr, card->iobase + PTR);  in sblive_writeptr()
221 		data |= inl(card->iobase + DATA) & ~mask;  in sblive_writeptr()
222 		outl(data, card->iobase + DATA);  in sblive_writeptr()
226 		outl(regptr, card->iobase + PTR);  in sblive_writeptr()
227 		outl(data, card->iobase + DATA);  in sblive_writeptr()
247 		outl(regptr, card->iobase + PTR);  in sblive_writeptr_tag()
254 			data |= inl(card->iobase + DATA) & ~mask;  in sblive_writeptr_tag()
256 		outl(data, card->iobase + DATA);  in sblive_writeptr_tag()
281 		outl(regptr, card->iobase + PTR);  in sblive_readptr()
282 		val = inl(card->iobase + DATA);  in sblive_readptr()
288 		outl(regptr, card->iobase + PTR);  in sblive_readptr()
289 		val = inl(card->iobase + DATA);  in sblive_readptr()
304         val = inl(card->iobase + INTE) | irq_mask;  in emu10k1_irq_enable()
305         outl(val, card->iobase + INTE);  in emu10k1_irq_enable()
318         val = inl(card->iobase + INTE) & ~irq_mask;  in emu10k1_irq_disable()
319         outl(val, card->iobase + INTE);  in emu10k1_irq_disable()
375 	outb(reg, card->iobase + AC97ADDRESS);  in emu10k1_ac97_read()
376 	data = inw(card->iobase + AC97DATA);  in emu10k1_ac97_read()
390 	outb(reg, card->iobase + AC97ADDRESS);  in emu10k1_ac97_write()
391 	outw(value, card->iobase + AC97DATA);  in emu10k1_ac97_write()
407 	if ((inb(card->iobase + MUSTAT) & MUSTAT_ORDYN) == 0) {  in emu10k1_mpu_write_data()
408 		outb(data, card->iobase + MUDATA);  in emu10k1_mpu_write_data()
425 	if ((inb(card->iobase + MUSTAT) & MUSTAT_IRDYN) == 0) {  in emu10k1_mpu_read_data()
426 		*data = inb(card->iobase + MUDATA);  in emu10k1_mpu_read_data()
445 		outb(MUCMD_RESET, card->iobase + MUCMD);  in emu10k1_mpu_reset()
451 		outb(MUCMD_RESET, card->iobase + MUCMD);  in emu10k1_mpu_reset()
457 		outb(MUCMD_ENTERUARTMODE, card->iobase + MUCMD);  in emu10k1_mpu_reset()
463 		status = inb(card->iobase + MUDATA);  in emu10k1_mpu_reset()