Lines Matching refs:RD_REG_WORD
896 RD_REG_WORD(®->ictrl); /* PCI Posted Write flush */ in qla1280_enable_intrs()
908 RD_REG_WORD(®->ictrl); /* PCI Posted Write flush */ in qla1280_disable_intrs()
1315 ha->mailbox_out[0] = RD_REG_WORD(®->mailbox0); in qla1280_mailbox_timeout()
1318 RD_REG_WORD(®->ictrl), RD_REG_WORD(®->istatus)); in qla1280_mailbox_timeout()
1356 RD_REG_WORD(&ha->iobase->istatus)); in qla1280_error_action()
1359 RD_REG_WORD(&ha->iobase->host_cmd), in qla1280_error_action()
1360 RD_REG_WORD(&ha->iobase->ictrl), jiffies); in qla1280_error_action()
2142 RD_REG_WORD(®->host_cmd); in qla1280_initialize_adapter()
2388 data = RD_REG_WORD(®->ictrl); in qla1280_chip_diag()
2402 RD_REG_WORD(®->id_l); /* Flush PCI write */ in qla1280_chip_diag()
2404 RD_REG_WORD(®->id_l); /* Flush PCI write */ in qla1280_chip_diag()
2410 RD_REG_WORD(®->id_l); /* Flush PCI write */ in qla1280_chip_diag()
2417 data = RD_REG_WORD(®->mailbox0); in qla1280_chip_diag()
2425 if (RD_REG_WORD(®->mailbox1) != PROD_ID_1 || in qla1280_chip_diag()
2426 (RD_REG_WORD(®->mailbox2) != PROD_ID_2 && in qla1280_chip_diag()
2427 RD_REG_WORD(®->mailbox2) != PROD_ID_2a) || in qla1280_chip_diag()
2428 RD_REG_WORD(®->mailbox3) != PROD_ID_3 || in qla1280_chip_diag()
2429 RD_REG_WORD(®->mailbox4) != PROD_ID_4) { in qla1280_chip_diag()
2432 RD_REG_WORD(®->mailbox1), in qla1280_chip_diag()
2433 RD_REG_WORD(®->mailbox2), in qla1280_chip_diag()
2434 RD_REG_WORD(®->mailbox3), in qla1280_chip_diag()
2435 RD_REG_WORD(®->mailbox4)); in qla1280_chip_diag()
3136 RD_REG_WORD(®->id_l); /* Flush PCI write */ in qla1280_nvram_request()
3139 reg_data = RD_REG_WORD(®->nvram); in qla1280_nvram_request()
3143 RD_REG_WORD(®->id_l); /* Flush PCI write */ in qla1280_nvram_request()
3150 RD_REG_WORD(®->id_l); /* Flush PCI write */ in qla1280_nvram_request()
3162 RD_REG_WORD(®->id_l); /* Flush PCI write */ in qla1280_nv_write()
3165 RD_REG_WORD(®->id_l); /* Flush PCI write */ in qla1280_nv_write()
3168 RD_REG_WORD(®->id_l); /* Flush PCI write */ in qla1280_nv_write()
3254 mb[0], ha->mailbox_out[0], RD_REG_WORD(®->istatus)); in qla1280_mailbox_command()
3256 RD_REG_WORD(®->mailbox0), RD_REG_WORD(®->mailbox1), in qla1280_mailbox_command()
3257 RD_REG_WORD(®->mailbox2), RD_REG_WORD(®->mailbox3)); in qla1280_mailbox_command()
3259 RD_REG_WORD(®->mailbox4), RD_REG_WORD(®->mailbox5), in qla1280_mailbox_command()
3260 RD_REG_WORD(®->mailbox6), RD_REG_WORD(®->mailbox7)); in qla1280_mailbox_command()
3309 data = RD_REG_WORD(®->istatus); in qla1280_poll()
3514 RD_REG_WORD(®->id_l); /* Flush PCI write */ in qla1280_reset_adapter()
3601 cnt = RD_REG_WORD(®->mailbox4); in qla1280_64bit_start_scsi()
3905 cnt = RD_REG_WORD(®->mailbox4); in qla1280_32bit_start_scsi()
4127 cnt = RD_REG_WORD(®->mailbox4); in qla1280_req_pkt()
4272 istatus = RD_REG_WORD(®->istatus); in qla1280_isr()
4277 mailbox[5] = RD_REG_WORD(®->mailbox5); in qla1280_isr()
4281 mailbox[0] = RD_REG_WORD(®->semaphore); in qla1280_isr()
4288 *wptr++ = RD_REG_WORD(®->mailbox0); in qla1280_isr()
4289 *wptr++ = RD_REG_WORD(®->mailbox1); in qla1280_isr()
4290 *wptr = RD_REG_WORD(®->mailbox2); in qla1280_isr()
4293 *wptr++ = RD_REG_WORD(®->mailbox3); in qla1280_isr()
4294 *wptr++ = RD_REG_WORD(®->mailbox4); in qla1280_isr()
4296 *wptr++ = RD_REG_WORD(®->mailbox6); in qla1280_isr()
4297 *wptr = RD_REG_WORD(®->mailbox7); in qla1280_isr()
4750 RD_REG_WORD(®->id_l); in qla1280_abort_isp()
4834 ret = RD_REG_WORD(addr); in qla1280_debounce_register()
4835 ret2 = RD_REG_WORD(addr); in qla1280_debounce_register()
4842 ret = RD_REG_WORD(addr); in qla1280_debounce_register()
4843 ret2 = RD_REG_WORD(addr); in qla1280_debounce_register()
4865 config_reg = RD_REG_WORD(®->cfg_1); in qla1280_check_for_dead_scsi_bus()
4867 scsi_control = RD_REG_WORD(®->scsiControlPins); in qla1280_check_for_dead_scsi_bus()