195    write1_io(reg_num,IO_WD_ADDR);  in read_3393()
205    write1_io(reg_num,IO_WD_ADDR);  in write_3393()
206    write1_io(value,IO_WD_DATA);  in write_3393()
214    write1_io(WD_COMMAND,IO_WD_ADDR);  in write_3393_cmd()
215    write1_io(cmd,IO_WD_DATA);  in write_3393_cmd()
236    write1_io(WD_TRANSFER_COUNT_MSB,IO_WD_ADDR);  in write_3393_count()
237    write1_io((value >> 16),IO_WD_DATA);  in write_3393_count()
238    write1_io((value >> 8),IO_WD_DATA);  in write_3393_count()
239    write1_io(value,IO_WD_DATA);  in write_3393_count()
247    write1_io(WD_TRANSFER_COUNT_MSB,IO_WD_ADDR);  in read_3393_count()
610       write1_io(WD_CDB_1, IO_WD_ADDR);  in in2000_execute()
612          write1_io(cmd->cmnd[i], IO_WD_DATA);  in in2000_execute()
643          write1_io(0, IO_FIFO_WRITE);  /* clear fifo counter, write mode */  in in2000_execute()
682             write1_io(0, IO_FIFO_READ);   /* put fifo in read mode */  in in2000_execute()
773    write1_io(0,IO_FIFO_WRITE); /* zero counter, assume write */  in transfer_bytes()
780       write1_io(0,IO_FIFO_READ);  in transfer_bytes()
899    write1_io(0, IO_LED_ON);  in in2000_intr()
993       write1_io(0, IO_LED_OFF);  in in2000_intr()
1011       write1_io(0, IO_LED_OFF);  in in2000_intr()
1607    write1_io(0, IO_LED_OFF);  in in2000_intr()
1630    write1_io(0, IO_LED_ON);  in reset_hardware()
1632       write1_io(0,IO_CARD_RESET);  in reset_hardware()
1643    write1_io(0,IO_FIFO_WRITE);            /* clear fifo counter */  in reset_hardware()
1644    write1_io(0,IO_FIFO_READ);             /* start fifo out in read mode */  in reset_hardware()
1659    write1_io(0, IO_LED_OFF);  in reset_hardware()
2038       write1_io(0,IO_FIFO_WRITE);            /* clear fifo counter */  in in2000_detect()
2039       write1_io(0,IO_FIFO_READ);             /* start fifo out in read mode */  in in2000_detect()
2040       write1_io(0,IO_INTR_MASK);    /* allow all ints */  in in2000_detect()