Lines Matching refs:reg

251 static unsigned char indirect_read(int socket, unsigned short reg)  in indirect_read()  argument
257 reg += socket * 0x40; in indirect_read()
259 outb(reg,port); in indirect_read()
265 static unsigned short indirect_read16(int socket, unsigned short reg) in indirect_read16() argument
271 reg = reg + socket * 0x40; in indirect_read16()
273 outb(reg,port); in indirect_read16()
275 reg++; in indirect_read16()
276 outb(reg,port); in indirect_read16()
282 static void indirect_write(int socket, unsigned short reg, unsigned char value) in indirect_write() argument
287 reg = reg + socket * 0x40; in indirect_write()
289 outb(reg,port); in indirect_write()
294 static void indirect_setbit(int socket, unsigned short reg, unsigned char mask) in indirect_setbit() argument
300 reg = reg + socket * 0x40; in indirect_setbit()
302 outb(reg,port); in indirect_setbit()
305 outb(reg,port); in indirect_setbit()
311 static void indirect_resetbit(int socket, unsigned short reg, unsigned char mask) in indirect_resetbit() argument
317 reg = reg + socket * 0x40; in indirect_resetbit()
319 outb(reg,port); in indirect_resetbit()
322 outb(reg,port); in indirect_resetbit()
327 static void indirect_write16(int socket, unsigned short reg, unsigned short value) in indirect_write16() argument
333 reg = reg + socket * 0x40; in indirect_write16()
336 outb(reg,port); in indirect_write16()
340 reg++; in indirect_write16()
342 outb(reg,port); in indirect_write16()
585 unsigned char reg,vcc,vpp; in i82092aa_get_socket() local
595 reg = indirect_read(sock,I365_POWER); /* PCTRL - Power Control Register */ in i82092aa_get_socket()
597 if (reg & I365_PWR_AUTO) in i82092aa_get_socket()
600 if (reg & I365_PWR_OUT) in i82092aa_get_socket()
603 vcc = reg & I365_VCC_MASK; vpp = reg & I365_VPP1_MASK; in i82092aa_get_socket()
605 …if (reg & I365_VCC_5V) { /* Can still be 3.3V, in this case the Vcc value will be overwritten late… in i82092aa_get_socket()
615 if ((reg & I365_VCC_3V)==I365_VCC_3V) in i82092aa_get_socket()
621 reg = indirect_read(sock, I365_INTCTL); /* IGENC, Interrupt and General Control */ in i82092aa_get_socket()
623 if ((reg & I365_PC_RESET)==0) in i82092aa_get_socket()
625 if (reg & I365_PC_IOCARD) in i82092aa_get_socket()
633 reg = indirect_read(sock, I365_CSCINT); /* CSCICR, Card Status Change Interrupt Configuration */ in i82092aa_get_socket()
635 if (reg & I365_CSC_DETECT) in i82092aa_get_socket()
639 if (reg & I365_CSC_STSCHG) in i82092aa_get_socket()
642 if (reg & I365_CSC_BVD1) in i82092aa_get_socket()
644 if (reg & I365_CSC_BVD2) in i82092aa_get_socket()
646 if (reg & I365_CSC_READY) in i82092aa_get_socket()
656 unsigned char reg; in i82092aa_set_socket() local
666 reg = 0; in i82092aa_set_socket()
668 reg = reg | I365_PC_RESET; in i82092aa_set_socket()
670 reg = reg | I365_PC_IOCARD; in i82092aa_set_socket()
672 indirect_write(sock,I365_INTCTL,reg); /* IGENC, Interrupt and General Control Register */ in i82092aa_set_socket()
676 reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */ in i82092aa_set_socket()
680 reg |= I365_PWR_AUTO; /* automatic power mngmnt */ in i82092aa_set_socket()
684 reg |= I365_PWR_OUT; /* enable power */ in i82092aa_set_socket()
692 reg |= I365_VCC_5V; in i82092aa_set_socket()
707 reg |= I365_VPP1_5V | I365_VPP2_5V; in i82092aa_set_socket()
711 reg |= I365_VPP1_12V | I365_VPP2_12V; in i82092aa_set_socket()
719 if (reg != indirect_read(sock,I365_POWER)) /* only write if changed */ in i82092aa_set_socket()
720 indirect_write(sock,I365_POWER,reg); in i82092aa_set_socket()
724 reg = 0x00; in i82092aa_set_socket()
726 reg |= I365_CSC_DETECT; in i82092aa_set_socket()
730 reg |= I365_CSC_STSCHG; in i82092aa_set_socket()
733 reg |= I365_CSC_BVD1; in i82092aa_set_socket()
735 reg |= I365_CSC_BVD2; in i82092aa_set_socket()
737 reg |= I365_CSC_READY; in i82092aa_set_socket()
743 indirect_write(sock,I365_CSCINT,reg); in i82092aa_set_socket()