278 	read_zsreg(c, R1);  in z8530_flush_fifo()
279 	read_zsreg(c, R1);  in z8530_flush_fifo()
280 	read_zsreg(c, R1);  in z8530_flush_fifo()
281 	read_zsreg(c, R1);  in z8530_flush_fifo()
284 		read_zsreg(c, R1);  in z8530_flush_fifo()
285 		read_zsreg(c, R1);  in z8530_flush_fifo()
286 		read_zsreg(c, R1);  in z8530_flush_fifo()
287 		read_zsreg(c, R1);  in z8530_flush_fifo()
345 		stat=read_zsreg(c, R1);  in z8530_rx()
520 		status=read_zsreg(chan, R1);  in z8530_dma_rx()
650 	stat=read_zsreg(c, R1);  in z8530_rx_clear()
818 	c->regs[R1]|=TxINT_ENAB;  in z8530_sync_open()
819 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_open()
924 	c->regs[R1]&= ~TxINT_ENAB;  in z8530_sync_dma_open()
925 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_dma_open()
931 	c->regs[R1]|= WT_FN_RDYFN;  in z8530_sync_dma_open()
932 	c->regs[R1]|= WT_RDY_RT;  in z8530_sync_dma_open()
933 	c->regs[R1]|= INT_ERR_Rx;  in z8530_sync_dma_open()
934 	c->regs[R1]&= ~TxINT_ENAB;  in z8530_sync_dma_open()
935 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_dma_open()
936 	c->regs[R1]|= WT_RDY_ENAB;  in z8530_sync_dma_open()
937 	write_zsreg(c, R1, c->regs[R1]);              in z8530_sync_dma_open()
1023 	c->regs[R1]&= ~WT_RDY_ENAB;  in z8530_sync_dma_close()
1024 	write_zsreg(c, R1, c->regs[R1]);              in z8530_sync_dma_close()
1025 	c->regs[R1]&= ~(WT_RDY_RT|WT_FN_RDYFN|INT_ERR_Rx);  in z8530_sync_dma_close()
1026 	c->regs[R1]|= INT_ALL_Rx;  in z8530_sync_dma_close()
1027 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_dma_close()
1120 	c->regs[R1]&= ~TxINT_ENAB;  in z8530_sync_txdma_open()
1121 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_txdma_open()
1192 	c->regs[R1]&= ~WT_RDY_ENAB;  in z8530_sync_txdma_close()
1193 	write_zsreg(c, R1, c->regs[R1]);              in z8530_sync_txdma_close()
1194 	c->regs[R1]&= ~(WT_RDY_RT|WT_FN_RDYFN|INT_ERR_Rx);  in z8530_sync_txdma_close()
1195 	c->regs[R1]|= INT_ALL_Rx;  in z8530_sync_txdma_close()
1196 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_txdma_close()