Lines Matching refs:writew
234 #undef writew
240 #define writew outw macro
733 writew(CmdReset, ioaddr + ChipCmd); in via_rhine_init_one()
1055 writew(0x0006, ioaddr + PCIBusConfig); /* Tune configuration??? */ in init_registers()
1072 writew(IntrRxDone | IntrRxErr | IntrRxEmpty| IntrRxOverflow | in init_registers()
1081 writew(np->chip_cmd, ioaddr + ChipCmd); in init_registers()
1137 writew(value, ioaddr + MIIData); in mdio_write()
1149 writew(CmdReset, ioaddr + ChipCmd); in via_rhine_open()
1205 writew(np->chip_cmd, ioaddr + ChipCmd); in via_rhine_check_duplex()
1251 writew(CmdReset, ioaddr + ChipCmd); in via_rhine_tx_timeout()
1335 writew(CmdTxDemand | np->chip_cmd, dev->base_addr + ChipCmd); in via_rhine_start_tx()
1371 writew(intr_status & 0xffff, ioaddr + IntrStatus); in via_rhine_interrupt()
1590 writew(readw(dev->base_addr + ChipCmd) | CmdRxOn | CmdRxDemand, in via_rhine_rx()
1623 writew(CmdTxDemand | np->chip_cmd, ioaddr + ChipCmd); in via_rhine_restart_tx()
1871 writew(0x0000, ioaddr + IntrEnable); in via_rhine_close()
1874 writew(CmdStop, ioaddr + ChipCmd); in via_rhine_close()