Lines Matching refs:ADDR

162 	outp(ADDR(CARD_DIS),0) ;		/* reset for all chips */
165 	outp(ADDR(CARD_EN),0) ;
178 		outp(ADDR(IRQ_CHCK_EN),0) ;
183 			outp(ADDR(BYPASS(STAT_INS)),0) ;/* insert station */
193 	outp(ADDR(B0_CTRL), CTRL_HPI_SET) ;
198 	outp(ADDR(B0_CTRL),CTRL_RST_SET) ;	/* reset for all chips */
199 	i = (int) inp(ADDR(B0_CTRL)) ;		/* do dummy read */
201 	outp(ADDR(B0_CTRL), CTRL_RST_CLR) ;
206 	outp(ADDR(B0_TST_CTRL), TST_CFG_WRITE_ON) ;	/* enable for writes */
209 	outp(ADDR(B0_TST_CTRL), TST_CFG_WRITE_OFF) ;	/* disable writes */
216 	outp(ADDR(B0_CTRL), CTRL_MRST_CLR|CTRL_HPI_CLR) ;
235 		outpd(ADDR(B4_R1_F), RX_WATERMARK) ;
236 		outpd(ADDR(B5_XA_F), TX_WATERMARK) ;
237 		outpd(ADDR(B5_XS_F), TX_WATERMARK) ;
240 	outp(ADDR(B0_CTRL),CTRL_RST_CLR) ;	/* clear the reset chips */
241 	outp(ADDR(B0_LED),LED_GA_OFF|LED_MY_ON|LED_GB_OFF) ; /* ye LED on */
244 	outpd(ADDR(B2_WDOG_INI),0x6FC23AC0) ;
265 	outp(ADDR(CARD_DIS),0) ;		/* reset for all chips */
272 	outp(ADDR(B0_CTRL), CTRL_HPI_SET) ;
277 	outp(ADDR(B0_CTRL),CTRL_RST_SET) ;	/* reset for all chips */
278 	outp(ADDR(B0_CTRL),CTRL_RST_CLR) ;	/* reset for all chips */
279 	outp(ADDR(B0_LED),LED_GA_OFF|LED_MY_OFF|LED_GB_OFF) ; /* all LEDs off */
497 			canonical[inp(ADDR(B2_MAC_0+i))] ;
504 	ConnectorType = inp(ADDR(B2_CONN_TYP)) ;
505 	PmdType = inp(ADDR(B2_PMD_TYP)) ;
541 	if (!(inp(ADDR(B0_DAS)) & DAS_AVAIL))
550 	if (!(inp(ADDR(B0_DAS)) & DAS_BYP_ST))
595 		outp(ADDR(BYPASS(STAT_INS)),0) ;/* insert station */
598 		outp(ADDR(BYPASS(STAT_BYP)),0) ;	/* bypass station */
605 		outp(ADDR(B0_DAS),DAS_BYP_INS) ;	/* insert station */
608 		outp(ADDR(B0_DAS),DAS_BYP_RMV) ;	/* bypass station */
623 	return(	(inp(ADDR(B0_DAS)) & DAS_BYP_ST) ? TRUE: FALSE) ;
751         outp(ADDR(B0_LED), led_state) ;
1477 		outpw(ADDR(B2_WDOG_CRTL),TIM_START) ;	/* Start timer. */
1492 		outpw(ADDR(B2_WDOG_CRTL),TIM_STOP) ;	/* Stop timer. */
1505 	return (READ_PROM(ADDR(B2_FDP))) ;